sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Drop Intel E7520 and E7525 and related boards

Browse Source 
There is no Cache As Ram for these boards, let's get rid of them.
Also drop unused dependencies

Change-Id: I94782da521c32ade7891ada29d3013cbab32a48b
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7836
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Stefan Reinauer
2014-12-17 02:46:24 +01:00
parent 61ed48c923
commit 5878bbd935
109 changed files with 0 additions and 10018 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/superio/nsc/Kconfig
View File

@@ -34,8 +34,6 @@ config SUPERIO_NSC_PC87392
bool
config SUPERIO_NSC_PC87417
bool
config SUPERIO_NSC_PC87427
bool
config SUPERIO_NSC_PC97307
bool
config SUPERIO_NSC_PC97317

1
src/superio/nsc/Makefile.inc
View File

@@ -25,6 +25,5 @@ subdirs-y += pc87382
subdirs-y += pc87384
subdirs-y += pc87392
subdirs-y += pc87417
subdirs-y += pc87427
subdirs-y += pc97307
subdirs-y += pc97317

22
src/superio/nsc/pc87427/Makefile.inc
View File

@@ -1,22 +0,0 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
ramstage-$(CONFIG_SUPERIO_NSC_PC87427) += superio.c

54
src/superio/nsc/pc87427/early_init.c
View File

@@ -1,54 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include "pc87427.h"
static void pc87427_disable_dev(pnp_devfn_t dev)
{
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
}
static void pc87427_enable_dev(pnp_devfn_t dev, u16 iobase)
{
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
}
static void xbus_cfg(pnp_devfn_t dev)
{
u8 i, data;
u16 xbus_index;
pnp_set_logical_device(dev);
/* Select proper BIOS size (4MB). */
pnp_write_config(dev, PC87427_XMEMCNF2,
(pnp_read_config(dev, PC87427_XMEMCNF2)) | 0x04);
xbus_index = pnp_read_iobase(dev, 0x60);
/* Enable writes to devices attached to XCS0 (XBUS Chip Select 0). */
for (i = 0; i <= 0xf; i++)
outb((i << 4), xbus_index + PC87427_HAP0);
}

118
src/superio/nsc/pc87427/pc87427.h
View File

@@ -1,118 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef SUPERIO_NSC_PC87427_PC87427_H
#define SUPERIO_NSC_PC87427_PC87427_H
#define PC87427_FDC 0x00 /* Floppy */
#define PC87427_SP2 0x02 /* Com2 */
#define PC87427_SP1 0x03 /* Com1 */
#define PC87427_SWC 0x04
#define PC87427_KBCM 0x05 /* Mouse */
#define PC87427_KBCK 0x06 /* Keyboard */
#define PC87427_GPIO 0x07
#define PC87427_FMC 0x09
#define PC87427_WDT 0x0A
#define PC87427_XBUS 0x0F
#define PC87427_RTC 0x10
#define PC87427_MHC 0x14
#define PC87427_GPIO_DEV PNP_DEV(0x2e, PC87427_GPIO)
/* This is to get around a romcc bug */
/* #define PC87427_XBUS_DEV PNP_DEV(0x2e, PC87427_XBUS) */
#define PC87427_XBUS_DEV PNP_DEV(0x2e, 0x0f)
#define PC87427_GPSEL 0xf0
#define PC87427_GPCFG1 0xf1
#define PC87427_GPEVR 0xf2
#define PC87427_GPCFG2 0xf3
#define PC87427_EXTCFG 0xf4
#define PC87427_IOEXT1A 0xf5
#define PC87427_IOEXT1B 0xf6
#define PC87427_IOEXT2A 0xf7
#define PC87427_IOEXT2B 0xf8
#define PC87427_GPDO_0 0x00
#define PC87427_GPDI_0 0x01
#define PC87427_GPDO_1 0x02
#define PC87427_GPDI_1 0x03
#define PC87427_GPEVEN_1 0x04
#define PC87427_GPEVST_1 0x05
#define PC87427_GPDO_2 0x06
#define PC87427_GPDI_2 0x07
#define PC87427_GPDO_3 0x08
#define PC87427_GPDI_3 0x09
#define PC87427_GPDO_4 0x0a
#define PC87427_GPDI_4 0x0b
#define PC87427_GPEVEN_4 0x0c
#define PC87427_GPEVST_4 0x0d
#define PC87427_GPDO_5 0x0e
#define PC87427_GPDI_5 0x0f
#define PC87427_GPDO_6 0x10
#define PC87427_GPDO_7A 0x11
#define PC87427_GPDO_7B 0x12
#define PC87427_GPDO_7C 0x13
#define PC87427_GPDO_7D 0x14
#define PC87427_GPDI_7A 0x15
#define PC87427_GPDI_7B 0x16
#define PC87427_GPDI_7C 0x17
#define PC87427_GPDI_7D 0x18
#define PC87427_XIOCNF 0xf0
#define PC87427_XIOBA1H 0xf1
#define PC87427_XIOBA1L 0xf2
#define PC87427_XIOSIZE1 0xf3
#define PC87427_XIOBA2H 0xf4
#define PC87427_XIOBA2L 0xf5
#define PC87427_XIOSIZE2 0xf6
#define PC87427_XMEMCNF1 0xf7
#define PC87427_XMEMCNF2 0xf8
#define PC87427_XMEMBAH 0xf9
#define PC87427_XMEMBAL 0xfa
#define PC87427_XMEMSIZE 0xfb
#define PC87427_XIRQMAP1 0xfc
#define PC87427_XIRQMAP2 0xfd
#define PC87427_XBIMM 0xfe
#define PC87427_XBBSL 0xff
#define PC87427_XBCNF 0x00
#define PC87427_XZCNF0 0x01
#define PC87427_XZCNF1 0x02
#define PC87427_XIRQC0 0x04
#define PC87427_XIRQC1 0x05
#define PC87427_XIRQC2 0x06
#define PC87427_XIMA0 0x08
#define PC87427_XIMA1 0x09
#define PC87427_XIMA2 0x0a
#define PC87427_XIMA3 0x0b
#define PC87427_XIMD 0x0c
#define PC87427_XZCNF2 0x0d
#define PC87427_XZCNF3 0x0e
#define PC87427_XZM0 0x0f
#define PC87427_XZM1 0x10
#define PC87427_XZM2 0x11
#define PC87427_XZM3 0x12
#define PC87427_HAP0 0x13
#define PC87427_HAP1 0x14
#define PC87427_XSCNF 0x15
#define PC87427_XWBCNF 0x16
#endif

75
src/superio/nsc/pc87427/superio.c
View File

@@ -1,75 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
#include <console/console.h>
#include <string.h>
#include <stdlib.h>
#include <pc80/keyboard.h>
#include "pc87427.h"
static void init(struct device *dev)
{
if (!dev->enabled)
return;
switch(dev->path.pnp.device) {
case PC87427_KBCK:
pc_keyboard_init();
break;
}
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = pnp_set_resources,
.enable_resources = pnp_enable_resources,
.enable = pnp_enable,
.init = init,
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, PC87427_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07fa, 0}, },
{ &ops, PC87427_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
{ &ops, PC87427_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
{ &ops, PC87427_SWC, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0, {0xfff0, 0}, {0xfffc, 0}, {0xfffc, 0}, {0xfff8, 0}, },
{ &ops, PC87427_KBCM, PNP_IRQ0, },
{ &ops, PC87427_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
{ &ops, PC87427_GPIO, PNP_IO0 | PNP_IRQ0, {0xffe0, 0}, },
{ &ops, PC87427_WDT, PNP_IO0 | PNP_IRQ0, {0xfff0, 0}, },
{ &ops, PC87427_FMC, PNP_IO0 | PNP_IRQ0, {0xffe0, 0}, },
{ &ops, PC87427_XBUS, PNP_IO0 | PNP_IRQ0, {0xffe0, 0}, },
{ &ops, PC87427_RTC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xfffe, 0}, {0xfffe, 0}, },
{ &ops, PC87427_MHC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xffe0, 0}, {0xffe0, 0}, },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_nsc_pc87427_ops = {
CHIP_NAME("NSC PC87427 Super I/O")
.enable_dev = enable_dev,
};