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mb/lenovo: Get rid of whitespace before tab

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Change-Id: I958fe66655cc3c589ce6709b83c56a9472628324
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26630
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Elyes HAOUAS
2018-05-28 13:40:21 +02:00
committed by Patrick Georgi
parent ca3405ff32
commit 58b9eeca32
4 changed files with 8 additions and 8 deletions
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2
src/mainboard/lenovo/g505s/acpi/gpe.asl
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@@ -73,4 +73,4 @@ Scope(\_GPE) { /* Start Scope GPE */
Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
} }
} /* End Scope GPE */ } /* End Scope GPE */

2
src/mainboard/lenovo/g505s/acpi/sleep.asl
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@@ -44,7 +44,7 @@ Method(\_PTS, 1) {
/* On older chips, clear PciExpWakeDisEn */ /* On older chips, clear PciExpWakeDisEn */
/*if (LLessEqual(\_SB.SBRI, 0x13)) { /*if (LLessEqual(\_SB.SBRI, 0x13)) {
* Store(0,\_SB.PWDE) * Store(0,\_SB.PWDE)
*} *}
*/ */

10
src/mainboard/lenovo/g505s/buildOpts.c
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@@ -169,11 +169,11 @@
#define BLDCFG_LVDS_POWER_ON_SEQ_BLON_TO_VARY_BL 3 #define BLDCFG_LVDS_POWER_ON_SEQ_BLON_TO_VARY_BL 3
#if IS_ENABLED(CONFIG_GFXUMA) #if IS_ENABLED(CONFIG_GFXUMA)
#define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED #define BLDCFG_UMA_ALIGNMENT UMA_4MB_ALIGNED
#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED #define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
//#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/ //#define BLDCFG_UMA_ALLOCATION_SIZE 0x1000//0x1800//0x1000 /* (1000 << 16) = 256M*/
#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M #define BLDCFG_UMA_ALLOCATION_SIZE 0x2000//512M
#define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE #define BLDCFG_UMA_ABOVE4G_SUPPORT FALSE
#endif #endif
#define BLDCFG_IOMMU_SUPPORT TRUE #define BLDCFG_IOMMU_SUPPORT TRUE

2
src/mainboard/lenovo/g505s/mainboard.h
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@@ -30,7 +30,7 @@
/* Any GEVENT pin can be mapped to any GPE. We try to keep the mapping 1:1, but /* Any GEVENT pin can be mapped to any GPE. We try to keep the mapping 1:1, but
* we make the distinction between GEVENT pin and SCI. * we make the distinction between GEVENT pin and SCI.
*/ */
#define EC_SCI_GPE EC_SCI_GEVENT #define EC_SCI_GPE EC_SCI_GEVENT
#define EC_LID_GPE EC_LID_GEVENT #define EC_LID_GPE EC_LID_GEVENT
#define PME_GPE 0x0b #define PME_GPE 0x0b
#define PCIE_GPE 0x18 #define PCIE_GPE 0x18