From 58eef23dcf5441bd8312b0329f6d9164f6f9d4a1 Mon Sep 17 00:00:00 2001 From: Evgeny Zinoviev Date: Sun, 6 May 2018 14:13:52 +0300 Subject: [PATCH] mb/lenovo: Add ThinkPad W530 support Tested and working: - Wi-Fi - Ethernet - WWAN ? (interface is created in linux, didn't actually test it, should work) - Bluetooth - Speakers - Internal mic - SD card reader - Suspend and resume - Keyboard, touchpad, trackpoint - Fan - Webcam - 4 RAM slots - All USB ports - mSATA - VGA ROM (FIXME: black screen after resume from s3) - Native graphics initialization (FIXME: probably incorrect panel frequency, etc. in GRUB; in linux everything's fine incl. resume from s3) - libgfxinit - GRUB payload - SeaBIOS payload - Internal flashing using flashrom Not tested yet: - Fingerprint reader - Colorimeter - Smart card reader - Docking station - VGA output - Optical disc drive - Discrete graphics TODO: - Test BDC detection Change-Id: Ic7918ea18712221cc62c5564caede340f71ce400 Signed-off-by: Evgeny Zinoviev Reviewed-on: https://review.coreboot.org/26136 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/mainboard/lenovo/t530/Kconfig | 29 ++- src/mainboard/lenovo/t530/Kconfig.name | 7 +- src/mainboard/lenovo/t530/Makefile.inc | 4 +- src/mainboard/lenovo/t530/board_info.txt | 2 + src/mainboard/lenovo/t530/gma-mainboard.ads | 20 ++ src/mainboard/lenovo/t530/romstage.c | 23 -- .../lenovo/t530/variants/t530/board_info.txt | 8 + .../lenovo/t530/{ => variants/t530}/data.vbt | Bin .../t530/{ => variants/t530}/devicetree.cb | 0 .../lenovo/t530/{ => variants/t530}/gpio.c | 0 .../lenovo/t530/variants/t530/romstage.c | 42 ++++ .../lenovo/t530/variants/w530/board_info.txt | 8 + .../lenovo/t530/variants/w530/data.vbt | Bin 0 -> 4459 bytes .../lenovo/t530/variants/w530/devicetree.cb | 224 ++++++++++++++++++ .../lenovo/t530/variants/w530/gpio.c | 219 +++++++++++++++++ .../lenovo/t530/variants/w530/romstage.c | 44 ++++ 16 files changed, 598 insertions(+), 32 deletions(-) create mode 100644 src/mainboard/lenovo/t530/gma-mainboard.ads create mode 100644 src/mainboard/lenovo/t530/variants/t530/board_info.txt rename src/mainboard/lenovo/t530/{ => variants/t530}/data.vbt (100%) rename src/mainboard/lenovo/t530/{ => variants/t530}/devicetree.cb (100%) rename src/mainboard/lenovo/t530/{ => variants/t530}/gpio.c (100%) create mode 100644 src/mainboard/lenovo/t530/variants/t530/romstage.c create mode 100644 src/mainboard/lenovo/t530/variants/w530/board_info.txt create mode 100644 src/mainboard/lenovo/t530/variants/w530/data.vbt create mode 100644 src/mainboard/lenovo/t530/variants/w530/devicetree.cb create mode 100644 src/mainboard/lenovo/t530/variants/w530/gpio.c create mode 100644 src/mainboard/lenovo/t530/variants/w530/romstage.c diff --git a/src/mainboard/lenovo/t530/Kconfig b/src/mainboard/lenovo/t530/Kconfig index de867c2e55..93ec83b51c 100644 --- a/src/mainboard/lenovo/t530/Kconfig +++ b/src/mainboard/lenovo/t530/Kconfig @@ -1,7 +1,5 @@ -if BOARD_LENOVO_T530 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y +config BOARD_LENOVO_BASEBOARD_T530 + def_bool n select SYSTEM_TYPE_LAPTOP select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE @@ -21,9 +19,14 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_LPC_TPM select MAINBOARD_HAS_TPM1 select DRIVERS_LENOVO_HYBRID_GRAPHICS + select MAINBOARD_HAS_LIBGFXINIT + select GFX_GMA_INTERNAL_IS_LVDS + # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE +if BOARD_LENOVO_BASEBOARD_T530 + config HAVE_IFD_BIN bool default n @@ -32,13 +35,24 @@ config HAVE_ME_BIN bool default n +config VARIANT_DIR + string + default "t530" if BOARD_LENOVO_T530 + default "w530" if BOARD_LENOVO_W530 + config MAINBOARD_DIR string default lenovo/t530 +config DEVICETREE + string + default "variants/t530/devicetree.cb" if BOARD_LENOVO_T530 + default "variants/w530/devicetree.cb" if BOARD_LENOVO_W530 + config MAINBOARD_PART_NUMBER string - default "ThinkPad T530" + default "ThinkPad T530" if BOARD_LENOVO_T530 + default "ThinkPad W530" if BOARD_LENOVO_W530 config MAX_CPUS int @@ -54,7 +68,8 @@ config DRAM_RESET_GATE_GPIO config VGA_BIOS_FILE string - default "pci8086,0106.rom" + default "pci8086,0106.rom" if BOARD_LENOVO_T530 + default "pci8086,0166.rom" if BOARD_LENOVO_W530 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID hex @@ -68,4 +83,4 @@ config ONBOARD_VGA_IS_PRIMARY bool default y -endif # BOARD_LENOVO_T530 +endif diff --git a/src/mainboard/lenovo/t530/Kconfig.name b/src/mainboard/lenovo/t530/Kconfig.name index b5dee66e9a..9bcd2c56e1 100644 --- a/src/mainboard/lenovo/t530/Kconfig.name +++ b/src/mainboard/lenovo/t530/Kconfig.name @@ -1,2 +1,7 @@ config BOARD_LENOVO_T530 - bool "ThinkPad T530" + bool "ThinkPad T530" + select BOARD_LENOVO_BASEBOARD_T530 + +config BOARD_LENOVO_W530 + bool "ThinkPad W530" + select BOARD_LENOVO_BASEBOARD_T530 diff --git a/src/mainboard/lenovo/t530/Makefile.inc b/src/mainboard/lenovo/t530/Makefile.inc index 9eb141adc9..7187013da4 100644 --- a/src/mainboard/lenovo/t530/Makefile.inc +++ b/src/mainboard/lenovo/t530/Makefile.inc @@ -14,4 +14,6 @@ ## smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c -romstage-y += gpio.c +romstage-y += variants/$(VARIANT_DIR)/gpio.c +romstage-y += variants/$(VARIANT_DIR)/romstage.c +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/lenovo/t530/board_info.txt b/src/mainboard/lenovo/t530/board_info.txt index 09ddde1f85..a659fe0794 100644 --- a/src/mainboard/lenovo/t530/board_info.txt +++ b/src/mainboard/lenovo/t530/board_info.txt @@ -1,3 +1,5 @@ +Vendor name: Lenovo +Board name: ThinkPad T530 baseboard Category: laptop ROM package: SOIC-8 ROM protocol: SPI diff --git a/src/mainboard/lenovo/t530/gma-mainboard.ads b/src/mainboard/lenovo/t530/gma-mainboard.ads new file mode 100644 index 0000000000..736dce71e0 --- /dev/null +++ b/src/mainboard/lenovo/t530/gma-mainboard.ads @@ -0,0 +1,20 @@ +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + + ports : constant Port_List := + (DP1, + DP2, + DP3, + HDMI1, + HDMI2, + HDMI3, + Analog, + Internal, + others => Disabled); + +end GMA.Mainboard; diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c index d2f7390314..7470acc086 100644 --- a/src/mainboard/lenovo/t530/romstage.c +++ b/src/mainboard/lenovo/t530/romstage.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include @@ -70,28 +69,6 @@ void mainboard_rcba_config(void) RCBA32(BUC) = 0; } -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 1, 0 }, /* P0: USB double port upper, USB3, OC 0 */ - { 1, 1, 1 }, /* P1: USB double port lower, USB3, (EHCI debug) OC 1 */ - { 1, 2, 3 }, /* P2: Dock, USB3, OC 3 */ - { 1, 1, -1 }, /* P3: WWAN slot, no OC */ - { 1, 1, 2 }, /* P4: yellow USB, OC 2 */ - { 1, 0, -1 }, /* P5: ExpressCard slot, no OC */ - { 0, 0, -1 }, /* P6: color sensor(w530), no OC */ - { 1, 2, -1 }, /* P7: docking, no OC */ - { 1, 0, -1 }, /* P8: smart card reader, no OC */ - { 1, 1, 5 }, /* P9: USB port single (EHCI debug), OC 5 */ - { 1, 0, -1 }, /* P10: fingerprint reader, no OC */ - { 1, 0, -1 }, /* P11: bluetooth, no OC. */ - { 1, 3, -1 }, /* P12: wlan, no OC - disabled in vendor bios*/ - { 1, 1, -1 }, /* P13: camera, no OC */ -}; - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) { - read_spd (&spd[0], 0x50, id_only); - read_spd (&spd[2], 0x51, id_only); -} - void mainboard_early_init(int s3resume) { hybrid_graphics_init(); diff --git a/src/mainboard/lenovo/t530/variants/t530/board_info.txt b/src/mainboard/lenovo/t530/variants/t530/board_info.txt new file mode 100644 index 0000000000..49f09e5f0d --- /dev/null +++ b/src/mainboard/lenovo/t530/variants/t530/board_info.txt @@ -0,0 +1,8 @@ +Vendor name: Lenovo +Board name: ThinkPad T530 +Category: laptop +ROM package: SOIC-8 +ROM protocol: SPI +ROM socketed: n +Flashrom support: n +Release year: 2012 diff --git a/src/mainboard/lenovo/t530/data.vbt b/src/mainboard/lenovo/t530/variants/t530/data.vbt similarity index 100% rename from src/mainboard/lenovo/t530/data.vbt rename to src/mainboard/lenovo/t530/variants/t530/data.vbt diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/variants/t530/devicetree.cb similarity index 100% rename from src/mainboard/lenovo/t530/devicetree.cb rename to src/mainboard/lenovo/t530/variants/t530/devicetree.cb diff --git a/src/mainboard/lenovo/t530/gpio.c b/src/mainboard/lenovo/t530/variants/t530/gpio.c similarity index 100% rename from src/mainboard/lenovo/t530/gpio.c rename to src/mainboard/lenovo/t530/variants/t530/gpio.c diff --git a/src/mainboard/lenovo/t530/variants/t530/romstage.c b/src/mainboard/lenovo/t530/variants/t530/romstage.c new file mode 100644 index 0000000000..7138de2fb9 --- /dev/null +++ b/src/mainboard/lenovo/t530/variants/t530/romstage.c @@ -0,0 +1,42 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2010 coresystems GmbH + * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * Copyright (C) 2014 Vladimir Serbinenko + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[2], 0x51, id_only); +} + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, /* P0: USB double port upper, USB3, OC 0 */ + { 1, 1, 1 }, /* P1: USB double port lower, USB3, (EHCI debug) OC 1 */ + { 1, 2, 3 }, /* P2: Dock, USB3, OC 3 */ + { 1, 1, -1 }, /* P3: WWAN slot, no OC */ + { 1, 1, 2 }, /* P4: yellow USB, OC 2 */ + { 1, 0, -1 }, /* P5: ExpressCard slot, no OC */ + { 0, 0, -1 }, /* P6: empty */ + { 1, 2, -1 }, /* P7: docking, no OC */ + { 1, 0, -1 }, /* P8: smart card reader, no OC */ + { 1, 1, 5 }, /* P9: USB port single (EHCI debug), OC 5 */ + { 1, 0, -1 }, /* P10: fingerprint reader, no OC */ + { 1, 0, -1 }, /* P11: bluetooth, no OC. */ + { 1, 3, -1 }, /* P12: wlan, no OC - disabled in vendor bios*/ + { 1, 1, -1 }, /* P13: camera, no OC */ +}; diff --git a/src/mainboard/lenovo/t530/variants/w530/board_info.txt b/src/mainboard/lenovo/t530/variants/w530/board_info.txt new file mode 100644 index 0000000000..d7d367979b --- /dev/null +++ b/src/mainboard/lenovo/t530/variants/w530/board_info.txt @@ -0,0 +1,8 @@ +Vendor name: Lenovo +Board name: ThinkPad W530 +Category: laptop +ROM package: SOIC-8 +ROM protocol: SPI +ROM socketed: n +Flashrom support: n +Release year: 2012 diff --git a/src/mainboard/lenovo/t530/variants/w530/data.vbt b/src/mainboard/lenovo/t530/variants/w530/data.vbt new file mode 100644 index 0000000000000000000000000000000000000000..4db2694250425f71cbc61459483121d97accb7e9 GIT binary patch literal 4459 zcmdT`U2GIp6h3!mc6avf%%9ImF=C;cv}-of)4u&vUp!QqVdk2fyRd3hJk2X zXKX9G1S?@n!R;FWNkWR$NVp~(A32g54t1BYo}rQCiCts+l6zCt@nbf}60taI*u6V7 zoEjTCl1j3kzGoX4H>=X<(S5^7)^YT}uGCl^%z5lo5Ct>Y>IWZC*o}lz46Wt*4fP(<2?;MJx%S=w(Ts@-Psb4#(SF@RT?`u zdSYzf-WQIrP^^qabX~7RTVZCp%wh+}MypuE@G$GTqi8SSneiQk4Qsin4?e zAr5d6gSh{RK%-$ZX$ zz{%yH6E^!UbB;GQ%iM`RCEvbmuk0yhMjCR|&LGAG{`p;3H9hPsCanlBVE8rw%_m1CT=mT>;RjA2v`Kbi@|K zT3Lo6S%brfR}t?ZK9DI~K};gPLVSn#5%DYH4}{B2p#ZTOu>nzycnT3iv?HEF3?cR- zjv`JW&LG}GypM1mg9)4W!h$1737i zg6|E$RDWQ@Z8gAr?fb{Uk3O5dgUGzYN-}m$Fl1oZ@$kWNL%zcj)Wt`w~^@g02pC8JKLr@HV<5dh9!Z11bHHE2S zT@_@W3!)Wc^*1o>qKMzg>B5JT#~VKZy}@?fd8sw5xD+Ra#CL?&)Y zF_wpf2yob(SYJF#&XAP74Wi;<5s%jBp&cG} z#G}3Dp&1Xm;?br&^ji=6%cD_+7AdSw(b^Q+r?8WXc2=S1751s3O)K=e!a&tDm99}) zRMmP_`n<}I@h5EbhVrdcbnzHKW zxFeXCh2yL%=r{axWz1{QZ0SmV7M7Mhw_yI$Du#0+4ux>53lXtIRlv8LUS$lC@?e?_QfiT{>{6 zw$kXYoIeW@e5M6#S + +const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio2 = GPIO_MODE_GPIO, + .gpio3 = GPIO_MODE_GPIO, + .gpio4 = GPIO_MODE_GPIO, + .gpio5 = GPIO_MODE_GPIO, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_NATIVE, + .gpio10 = GPIO_MODE_GPIO, + .gpio11 = GPIO_MODE_NATIVE, + .gpio12 = GPIO_MODE_NATIVE, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_NATIVE, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_NATIVE, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_NATIVE, + .gpio19 = GPIO_MODE_NATIVE, + .gpio20 = GPIO_MODE_NATIVE, + .gpio21 = GPIO_MODE_GPIO, + .gpio22 = GPIO_MODE_GPIO, + .gpio23 = GPIO_MODE_NATIVE, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_NATIVE, + .gpio26 = GPIO_MODE_NATIVE, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, + .gpio29 = GPIO_MODE_GPIO, + .gpio30 = GPIO_MODE_NATIVE, + .gpio31 = GPIO_MODE_NATIVE, +}; + +const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio2 = GPIO_DIR_INPUT, + .gpio3 = GPIO_DIR_INPUT, + .gpio4 = GPIO_DIR_INPUT, + .gpio5 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_OUTPUT, + .gpio10 = GPIO_DIR_OUTPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_OUTPUT, + .gpio17 = GPIO_DIR_INPUT, + .gpio21 = GPIO_DIR_INPUT, + .gpio22 = GPIO_DIR_OUTPUT, + .gpio24 = GPIO_DIR_OUTPUT, + .gpio27 = GPIO_DIR_INPUT, + .gpio28 = GPIO_DIR_OUTPUT, + .gpio29 = GPIO_DIR_OUTPUT, +}; + +const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio8 = GPIO_LEVEL_LOW, + .gpio10 = GPIO_LEVEL_HIGH, + .gpio15 = GPIO_LEVEL_LOW, + .gpio22 = GPIO_LEVEL_HIGH, + .gpio24 = GPIO_LEVEL_LOW, + .gpio28 = GPIO_LEVEL_LOW, + .gpio29 = GPIO_LEVEL_HIGH, +}; + +const struct pch_gpio_set1 pch_gpio_set1_reset = { + .gpio24 = GPIO_RESET_RSMRST, +}; + +const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio1 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, +}; + +const struct pch_gpio_set1 pch_gpio_set1_blink = { +}; + +const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_NATIVE, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_GPIO, + .gpio36 = GPIO_MODE_GPIO, + .gpio37 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, + .gpio40 = GPIO_MODE_NATIVE, + .gpio41 = GPIO_MODE_NATIVE, + .gpio42 = GPIO_MODE_NATIVE, + .gpio43 = GPIO_MODE_GPIO, + .gpio44 = GPIO_MODE_NATIVE, + .gpio45 = GPIO_MODE_NATIVE, + .gpio46 = GPIO_MODE_NATIVE, + .gpio47 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_GPIO, + .gpio49 = GPIO_MODE_GPIO, + .gpio50 = GPIO_MODE_GPIO, + .gpio51 = GPIO_MODE_GPIO, + .gpio52 = GPIO_MODE_GPIO, + .gpio53 = GPIO_MODE_GPIO, + .gpio54 = GPIO_MODE_GPIO, + .gpio55 = GPIO_MODE_GPIO, + .gpio56 = GPIO_MODE_NATIVE, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio59 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_NATIVE, + .gpio61 = GPIO_MODE_NATIVE, + .gpio62 = GPIO_MODE_NATIVE, + .gpio63 = GPIO_MODE_NATIVE, +}; + +const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio33 = GPIO_DIR_OUTPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio35 = GPIO_DIR_INPUT, + .gpio36 = GPIO_DIR_INPUT, + .gpio37 = GPIO_DIR_INPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, + .gpio43 = GPIO_DIR_OUTPUT, + .gpio48 = GPIO_DIR_INPUT, + .gpio49 = GPIO_DIR_INPUT, + .gpio50 = GPIO_DIR_INPUT, + .gpio51 = GPIO_DIR_OUTPUT, + .gpio52 = GPIO_DIR_OUTPUT, + .gpio53 = GPIO_DIR_OUTPUT, + .gpio54 = GPIO_DIR_INPUT, + .gpio55 = GPIO_DIR_OUTPUT, + .gpio57 = GPIO_DIR_INPUT, +}; + +const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio33 = GPIO_LEVEL_HIGH, + .gpio43 = GPIO_LEVEL_HIGH, + .gpio51 = GPIO_LEVEL_HIGH, + .gpio52 = GPIO_LEVEL_HIGH, + .gpio53 = GPIO_LEVEL_HIGH, + .gpio55 = GPIO_LEVEL_HIGH, +}; + +const struct pch_gpio_set2 pch_gpio_set2_reset = { +}; + +const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio64 = GPIO_MODE_GPIO, + .gpio65 = GPIO_MODE_GPIO, + .gpio66 = GPIO_MODE_GPIO, + .gpio67 = GPIO_MODE_GPIO, + .gpio68 = GPIO_MODE_GPIO, + .gpio69 = GPIO_MODE_GPIO, + .gpio70 = GPIO_MODE_GPIO, + .gpio71 = GPIO_MODE_GPIO, + .gpio72 = GPIO_MODE_NATIVE, + .gpio73 = GPIO_MODE_NATIVE, + .gpio74 = GPIO_MODE_NATIVE, + .gpio75 = GPIO_MODE_NATIVE, +}; + +const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio64 = GPIO_DIR_INPUT, + .gpio65 = GPIO_DIR_INPUT, + .gpio66 = GPIO_DIR_INPUT, + .gpio67 = GPIO_DIR_INPUT, + .gpio68 = GPIO_DIR_INPUT, + .gpio69 = GPIO_DIR_INPUT, + .gpio70 = GPIO_DIR_INPUT, + .gpio71 = GPIO_DIR_INPUT, +}; + +const struct pch_gpio_set3 pch_gpio_set3_level = { +}; + +const struct pch_gpio_set3 pch_gpio_set3_reset = { +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + .reset = &pch_gpio_set1_reset, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + .reset = &pch_gpio_set2_reset, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + .level = &pch_gpio_set3_level, + .reset = &pch_gpio_set3_reset, + }, +}; diff --git a/src/mainboard/lenovo/t530/variants/w530/romstage.c b/src/mainboard/lenovo/t530/variants/w530/romstage.c new file mode 100644 index 0000000000..9fe6f84647 --- /dev/null +++ b/src/mainboard/lenovo/t530/variants/w530/romstage.c @@ -0,0 +1,44 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2010 coresystems GmbH + * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * Copyright (C) 2014 Vladimir Serbinenko + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[1], 0x52, id_only); + read_spd(&spd[2], 0x51, id_only); + read_spd(&spd[3], 0x53, id_only); +} + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, /* P0: USB double port upper, USB3, OC 0 */ + { 1, 1, 1 }, /* P1: USB double port lower, USB3, (EHCI debug) OC 1 */ + { 1, 2, 3 }, /* P2: Dock, USB3, OC 3 */ + { 1, 1, -1 }, /* P3: WWAN slot, no OC */ + { 1, 1, 2 }, /* P4: yellow USB, OC 2 */ + { 1, 0, -1 }, /* P5: ExpressCard slot, no OC */ + { 1, 0, -1 }, /* P6: color sensor, no OC */ + { 1, 2, -1 }, /* P7: docking, no OC */ + { 1, 0, -1 }, /* P8: smart card reader, no OC */ + { 1, 1, 5 }, /* P9: USB port single (EHCI debug), OC 5 */ + { 1, 0, -1 }, /* P10: fingerprint reader, no OC */ + { 1, 0, -1 }, /* P11: bluetooth, no OC. */ + { 1, 3, -1 }, /* P12: wlan, no OC - disabled in vendor bios*/ + { 1, 1, -1 }, /* P13: camera, no OC */ +};