addw3: Do not configure GPIOs already configured

Change-Id: Ic2702d798ae46cff22e8ef2e9f76e1f69966ea86
This commit is contained in:
Jeremy Soller
2023-02-27 14:25:28 -07:00
parent 314b707dc5
commit 58f4c7fe95
2 changed files with 8 additions and 9 deletions

View File

@@ -83,8 +83,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), // I2C0_SCL_TP
PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), // PCH_I2C_SDA
PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), // PCH_I2C_SCL
PAD_NC(GPP_C20, NONE), // UART2_RXD
PAD_NC(GPP_C21, NONE), // UART2_TXD
// GPP_C20 (UART2_RXD) configured in bootblock
// GPP_C21 (UART2_TXD) configured in bootblock
PAD_NC(GPP_C22, NONE),
PAD_NC(GPP_C23, NONE),
@@ -179,12 +179,12 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI(GPP_H1, NONE, DEEP), // WLAN_WAKE#
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF1), // SSD2_CLKREQ#
PAD_NC(GPP_H3, NONE),
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1), // SSD1_CLKREQ#
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1), // WLAN_CLKREQ#
PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), // CARD_CLKREQ#
PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), // LAN_CLKREQ#
PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1), // PEG_CLKREQ#
PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1), // TBT_CLKREQ#
// GPP_H4 (SSD1_CLKREQ#) configured by FSP
// GPP_H5 (WLAN_CLKREQ#) configured by FSP
// GPP_H6 (CARD_CLKREQ#) configured by FSP
// GPP_H7 (LAN_CLKREQ#) configured by FSP
// GPP_H8 (PEG_CLKREQ#) configured by FSP
// GPP_H9 (TBT_CLKREQ#) configured by FSP
PAD_CFG_NF(GPP_H10, NONE, PLTRST, NF1), // GPP_H10_SML2CLK
PAD_CFG_NF(GPP_H11, NONE, PLTRST, NF1), // GPP_H11_SML2DATA
PAD_CFG_GPO(GPP_H12, 0, DEEP), // GPP_H12

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@@ -39,7 +39,6 @@ chip soc/intel/alderlake
end
end
#TODO: Reversed
device ref pcie5_0 on
# CPU PCIe RP#2 x8, Clock 14 (DGPU)
register "cpu_pcie_rp[CPU_RP(2)]" = "{