AGESA: Switch to MMCONF_SUPPORT_DEFAULT

Vendorcode always does PCI MMCONF access once it is
enabled via MSR.

In coreboot proper, we don't give opportunity to make
pci_read/write calls before PCI MMCONF is enabled via MSR.
This happens early in romstage amd_initmmio() for all cores.

Change-Id: If31bc0a67b480bcc1d955632f413f5cdeec51a54
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17533
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2016-11-20 11:03:13 +02:00
parent 7d09cfcf74
commit 59e0334207
51 changed files with 48 additions and 32 deletions

View File

@@ -17,6 +17,7 @@ config CPU_AMD_AGESA_FAMILY10
bool
select CPU_AMD_MODEL_10XXX
select PCI_IO_CFG_EXT
select MMCONF_SUPPORT_DEFAULT
select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY10

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@@ -16,6 +16,7 @@
config CPU_AMD_AGESA_FAMILY12
bool
select PCI_IO_CFG_EXT
select MMCONF_SUPPORT_DEFAULT
select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY12

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@@ -16,6 +16,7 @@
config CPU_AMD_AGESA_FAMILY14
bool
select PCI_IO_CFG_EXT
select MMCONF_SUPPORT_DEFAULT
select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY14

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@@ -16,6 +16,7 @@
config CPU_AMD_AGESA_FAMILY15
bool
select PCI_IO_CFG_EXT
select MMCONF_SUPPORT_DEFAULT
select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY15

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@@ -17,6 +17,7 @@
config CPU_AMD_AGESA_FAMILY15_RL
bool
select PCI_IO_CFG_EXT
select MMCONF_SUPPORT_DEFAULT
select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY15_RL

View File

@@ -16,6 +16,7 @@
config CPU_AMD_AGESA_FAMILY15_TN
bool
select PCI_IO_CFG_EXT
select MMCONF_SUPPORT_DEFAULT
select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY15_TN

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@@ -16,6 +16,7 @@
config CPU_AMD_AGESA_FAMILY16_KB
bool
select PCI_IO_CFG_EXT
select MMCONF_SUPPORT_DEFAULT
select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY16_KB