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AGESA: Switch to MMCONF_SUPPORT_DEFAULT

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Vendorcode always does PCI MMCONF access once it is
enabled via MSR.

In coreboot proper, we don't give opportunity to make
pci_read/write calls before PCI MMCONF is enabled via MSR.
This happens early in romstage amd_initmmio() for all cores.

Change-Id: If31bc0a67b480bcc1d955632f413f5cdeec51a54
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17533
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2016-11-20 11:03:13 +02:00
parent 7d09cfcf74
commit 59e0334207
51 changed files with 48 additions and 32 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/northbridge/amd/agesa/family10/Kconfig
View File

@@ -18,7 +18,6 @@ config NORTHBRIDGE_AMD_AGESA_FAMILY10
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HYPERTRANSPORT_PLUGIN_SUPPORT
select MMCONF_SUPPORT
if NORTHBRIDGE_AMD_AGESA_FAMILY10

2
src/northbridge/amd/agesa/family10/northbridge.c
View File

@@ -1096,13 +1096,11 @@ static void cpu_bus_init(device_t dev)
static void cpu_bus_read_resources(device_t dev)
{
#if CONFIG_MMCONF_SUPPORT
struct resource *resource = new_resource(dev, 0xc0010058);
resource->base = CONFIG_MMCONF_BASE_ADDRESS;
resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256;
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
#endif
}
static void cpu_bus_set_resources(device_t dev)

1
src/northbridge/amd/agesa/family12/Kconfig
View File

@@ -17,7 +17,6 @@ config NORTHBRIDGE_AMD_AGESA_FAMILY12
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HYPERTRANSPORT_PLUGIN_SUPPORT
select MMCONF_SUPPORT
if NORTHBRIDGE_AMD_AGESA_FAMILY12

2
src/northbridge/amd/agesa/family12/northbridge.c
View File

@@ -649,13 +649,11 @@ static void cpu_bus_read_resources(device_t dev)
{
printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__);
#if CONFIG_MMCONF_SUPPORT
struct resource *resource = new_resource(dev, 0xc0010058);
resource->base = CONFIG_MMCONF_BASE_ADDRESS;
resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256;
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
#endif
printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__);
}

1
src/northbridge/amd/agesa/family14/Kconfig
View File

@@ -14,7 +14,6 @@
##
config NORTHBRIDGE_AMD_AGESA_FAMILY14
bool
select MMCONF_SUPPORT
if NORTHBRIDGE_AMD_AGESA_FAMILY14

2
src/northbridge/amd/agesa/family14/northbridge.c
View File

@@ -302,13 +302,11 @@ static void nb_read_resources(device_t dev)
* It is not honored by the coreboot resource allocator if it is in
* the CPU_CLUSTER.
*/
#if CONFIG_MMCONF_SUPPORT
struct resource *resource = new_resource(dev, 0xc0010058);
resource->base = CONFIG_MMCONF_BASE_ADDRESS;
resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256;
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
#endif
}
static void set_resource(device_t dev, struct resource *resource, u32 nodeid)

1
src/northbridge/amd/agesa/family15/Kconfig
View File

@@ -18,7 +18,6 @@ config NORTHBRIDGE_AMD_AGESA_FAMILY15
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HYPERTRANSPORT_PLUGIN_SUPPORT
select MMCONF_SUPPORT
if NORTHBRIDGE_AMD_AGESA_FAMILY15

2
src/northbridge/amd/agesa/family15/northbridge.c
View File

@@ -326,13 +326,11 @@ static void nb_read_resources(device_t dev)
* It is not honored by the coreboot resource allocator if it is in
* the CPU_CLUSTER.
*/
#if CONFIG_MMCONF_SUPPORT
struct resource *resource = new_resource(dev, 0xc0010058);
resource->base = CONFIG_MMCONF_BASE_ADDRESS;
resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256;
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
#endif
}
static void set_resource(device_t dev, struct resource *resource, u32 nodeid)

1
src/northbridge/amd/agesa/family15rl/Kconfig
View File

@@ -14,7 +14,6 @@
##
config NORTHBRIDGE_AMD_AGESA_FAMILY15_RL
bool
select MMCONF_SUPPORT
if NORTHBRIDGE_AMD_AGESA_FAMILY15_RL

2
src/northbridge/amd/agesa/family15rl/northbridge.c
View File

@@ -326,13 +326,11 @@ static void read_resources(struct device *dev)
* It is not honored by the coreboot resource allocator if it is in
* the CPU_CLUSTER.
*/
#if CONFIG_MMCONF_SUPPORT
struct resource *resource = new_resource(dev, 0xc0010058);
resource->base = CONFIG_MMCONF_BASE_ADDRESS;
resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256;
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
#endif
}
static void set_resource(struct device *dev, struct resource *resource, u32 nodeid)

1
src/northbridge/amd/agesa/family15tn/Kconfig
View File

@@ -14,7 +14,6 @@
##
config NORTHBRIDGE_AMD_AGESA_FAMILY15_TN
bool
select MMCONF_SUPPORT
if NORTHBRIDGE_AMD_AGESA_FAMILY15_TN

2
src/northbridge/amd/agesa/family15tn/northbridge.c
View File

@@ -325,13 +325,11 @@ static void nb_read_resources(device_t dev)
* It is not honored by the coreboot resource allocator if it is in
* the CPU_CLUSTER.
*/
#if CONFIG_MMCONF_SUPPORT
struct resource *resource = new_resource(dev, 0xc0010058);
resource->base = CONFIG_MMCONF_BASE_ADDRESS;
resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256;
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
#endif
}
static void set_resource(device_t dev, struct resource *resource, u32 nodeid)

1
src/northbridge/amd/agesa/family16kb/Kconfig
View File

@@ -15,7 +15,6 @@
##
config NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
bool
select MMCONF_SUPPORT
if NORTHBRIDGE_AMD_AGESA_FAMILY16_KB

2
src/northbridge/amd/agesa/family16kb/northbridge.c
View File

@@ -325,13 +325,11 @@ static void read_resources(device_t dev)
* It is not honored by the coreboot resource allocator if it is in
* the APIC_CLUSTER.
*/
#if CONFIG_MMCONF_SUPPORT
struct resource *resource = new_resource(dev, 0xc0010058);
resource->base = CONFIG_MMCONF_BASE_ADDRESS;
resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256;
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
#endif
}
static void set_resource(device_t dev, struct resource *resource, u32 nodeid)