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soc/amd/picasso: Adjust I2C ASL

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Clarify names as I2C2, etc.  Use iomap.h defines for base addresses.
Update IRQs.

Change-Id: I3800592e4b0bcb681d0dcf24f69e269f845be025
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34915
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Marshall Dawson
2019-08-15 17:49:11 -06:00
committed by Martin Roth
parent 9269be630b
commit 59e97b6378
2 changed files with 22 additions and 38 deletions
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54
src/soc/amd/picasso/acpi/sb_fch.asl
View File

@@ -113,43 +113,13 @@ Device (FUR3) {
} }
} }
Device (I2CA) { Device (I2C2) {
Name (_HID, "AMD0010")
Name (_UID, 0x0)
Name (_CRS, ResourceTemplate()
{
IRQ (Edge, ActiveHigh, Exclusive) { 3 }
Memory32Fixed (ReadWrite, 0xFEDC2000, 0x1000)
})
Method (_STA, 0x0, NotSerialized)
{
Return (0x0F)
}
}
Device (I2CB)
{
Name (_HID, "AMD0010")
Name (_UID, 0x1)
Name (_CRS, ResourceTemplate()
{
IRQ (Edge, ActiveHigh, Exclusive) { 15 }
Memory32Fixed (ReadWrite, 0xFEDC3000, 0x1000)
})
Method (_STA, 0x0, NotSerialized)
{
Return (0x0F)
}
}
Device (I2CC) {
Name (_HID, "AMD0010") Name (_HID, "AMD0010")
Name (_UID, 0x2) Name (_UID, 0x2)
Name (_CRS, ResourceTemplate() Name (_CRS, ResourceTemplate()
{ {
IRQ (Edge, ActiveHigh, Exclusive) { 6 } IRQ (Edge, ActiveHigh, Exclusive) { 4 }
Memory32Fixed (ReadWrite, 0xFEDC4000, 0x1000) Memory32Fixed (ReadWrite, APU_I2C2_BASE, 0x1000)
}) })
Method (_STA, 0x0, NotSerialized) Method (_STA, 0x0, NotSerialized)
@@ -158,13 +128,27 @@ Device (I2CC) {
} }
} }
Device (I2CD) Device (I2C3)
{ {
Name (_HID, "AMD0010") Name (_HID, "AMD0010")
Name (_UID, 0x3) Name (_UID, 0x3)
Name (_CRS, ResourceTemplate() {
IRQ (Edge, ActiveHigh, Exclusive) { 6 }
Memory32Fixed(ReadWrite, APU_I2C3_BASE, 0x1000)
})
Method (_STA, 0x0, NotSerialized)
{
Return (0x0F)
}
}
Device (I2C4)
{
Name (_HID, "AMD0010")
Name (_UID, 0x4)
Name (_CRS, ResourceTemplate() { Name (_CRS, ResourceTemplate() {
IRQ (Edge, ActiveHigh, Exclusive) { 14 } IRQ (Edge, ActiveHigh, Exclusive) { 14 }
Memory32Fixed(ReadWrite, 0xFEDC5000, 0x1000) Memory32Fixed(ReadWrite, APU_I2C4_BASE, 0x1000)
}) })
Method (_STA, 0x0, NotSerialized) Method (_STA, 0x0, NotSerialized)
{ {

6
src/soc/amd/picasso/i2c.c
View File

@@ -73,11 +73,11 @@ const char *i2c_acpi_name(const struct device *dev)
{ {
switch (dev->path.mmio.addr) { switch (dev->path.mmio.addr) {
case APU_I2C2_BASE: case APU_I2C2_BASE:
return "I2CC"; return "I2C2";
case APU_I2C3_BASE: case APU_I2C3_BASE:
return "I2CD"; return "I2C3";
case APU_I2C4_BASE: case APU_I2C4_BASE:
return "I2CE"; return "I2C4";
default: default:
return NULL; return NULL;
} }