spd.h: Move enum ddr2_module_type to ddr2.h
Move specific enum ddr2_module_type to <device/dram/ddr2.h>. Change-Id: I748658f9b349bff9b1ebe2c0a6acf71bf2a221ce Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71546 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@@ -18,15 +18,12 @@
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#include <spd.h>
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#include <device/dram/common.h>
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/*
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* Module type (byte 20, bits 5:0) of SPD
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* This definition is specific to DDR2. DDR3 SPDs have a different structure.
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*/
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/* Byte 20 [5:0]: DDR2 Module type information */
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enum spd_dimm_type_ddr2 {
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SPD_DDR2_DIMM_TYPE_UNDEFINED = 0x00,
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SPD_DDR2_DIMM_TYPE_RDIMM = 0x01,
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SPD_DDR2_DIMM_TYPE_UDIMM = 0x02,
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SPD_DDR2_DIMM_TYPE_SO_DIMM = 0x04,
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SPD_DDR2_DIMM_TYPE_UNDEFINED = 0x00,
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SPD_DDR2_DIMM_TYPE_RDIMM = 0x01,
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SPD_DDR2_DIMM_TYPE_UDIMM = 0x02,
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SPD_DDR2_DIMM_TYPE_SO_DIMM = 0x04,
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SPD_DDR2_DIMM_TYPE_72B_SO_CDIMM = 0x06,
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SPD_DDR2_DIMM_TYPE_72B_SO_RDIMM = 0x07,
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SPD_DDR2_DIMM_TYPE_MICRO_DIMM = 0x08,
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@@ -201,18 +201,6 @@ enum spd_memory_type {
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#define SPD_ECC_8BIT (1<<3)
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#define SPD_ECC_8BIT_LP5_DDR5 (1<<4)
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/* Byte 20 [5:0]: DDR2 Module type information */
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enum ddr2_module_type {
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DDR2_SPD_RDIMM = 0x01,
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DDR2_SPD_UDIMM = 0x02,
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DDR2_SPD_SODIMM = 0x04,
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DDR2_SPD_72B_SO_CDIMM = 0x06,
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DDR2_SPD_72B_SO_RDIMM = 0x07,
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DDR2_SPD_MICRO_DIMM = 0x08,
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DDR2_SPD_MINI_RDIMM = 0x10,
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DDR2_SPD_MINI_UDIMM = 0x20,
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};
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/* Byte 3 [3:0]: DDR3 Module type information */
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enum ddr3_module_type {
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DDR3_SPD_RDIMM = 0x01,
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