cpu/x86/lapic: Refactor timer_fsb()

Common apic_timer code in cpu/x86 should not depend on
intel header files.

Change-Id: Ib099921d4b8e561daea47219385762bb00fc4548
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34091
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki
2019-07-01 10:12:45 +03:00
committed by Patrick Georgi
parent 7841a7f824
commit 5a157176dd
4 changed files with 36 additions and 53 deletions

View File

@@ -15,15 +15,7 @@
#define CPU_INTEL_FSB_H
/*
* This function returns:
* the system bus speed value in MHz
* -1 if FSB is not found
* -2 if the CPU is not supported
*/
int get_ia32_fsb(void);
/*
* This function returns round up 3 * get_ia32_fsb()
* This function returns round up 3 * get_timer_fsb()
*/
int get_ia32_fsb_x3(void);

View File

@@ -1,6 +1,17 @@
#ifndef DELAY_H
#define DELAY_H
#include <stdint.h>
#if CONFIG_UDELAY_LAPIC_FIXED_FSB != 0
static inline u32 get_timer_fsb(void)
{
return CONFIG_UDELAY_LAPIC_FIXED_FSB;
}
#else
u32 get_timer_fsb(void);
#endif
void init_timer(void);
void udelay(unsigned int usecs);