soc/intel/denverton_ns: Enable common code for CPU
Change-Id: Ib215aa17dd20112946b74a1b63ce8a735388873c Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net> Reviewed-on: https://review.coreboot.org/24927 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Patrick Georgi
parent
f729cd0b40
commit
5a1f5400fb
@@ -45,6 +45,7 @@ config CPU_SPECIFIC_OPTIONS
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select PCR_COMMON_IOSF_1_0
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select PCR_COMMON_IOSF_1_0
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select SMP
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select SMP
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select SOC_INTEL_COMMON_BLOCK
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select SOC_INTEL_COMMON_BLOCK
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select SOC_INTEL_COMMON_BLOCK_CPU
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# select SOC_INTEL_COMMON_BLOCK_SA
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# select SOC_INTEL_COMMON_BLOCK_SA
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select SOC_INTEL_COMMON_BLOCK_FAST_SPI
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select SOC_INTEL_COMMON_BLOCK_FAST_SPI
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select SOC_INTEL_COMMON_BLOCK_GPIO
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select SOC_INTEL_COMMON_BLOCK_GPIO
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@@ -117,6 +118,10 @@ config CPU_MICROCODE_CBFS_LEN
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hex
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hex
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default 0x0ff80
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default 0x0ff80
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config CPU_BCLK_MHZ
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int
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default 100
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config SMM_TSEG_SIZE
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config SMM_TSEG_SIZE
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hex
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hex
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default 0x200000
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default 0x200000
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