This patch drops arch/i386/lib/console.c and arch/i386/lib/console_print.c and

makes include/console/console.h and console/console.c usable both in
__PRE_RAM__ and coreboot_ram stages.

While debugging this, I removed an indirection from the e7520 ram init code
(same as we did on a couple of other chipsets, removes some register pressure
  from romcc)

Also, drop remainders of CONFIG_USE_INIT (except the one odd piece of dead code 
		in cache_as_ram.inc)

Then some ap_romstage.c fixes, at least the nvidia/l1_2pvv compiled for me with
CONFIG_AP_CODE_IN_CAR set in Kconfig which it did not before.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/Kconfig

@@ -796,10 +796,6 @@ config AP_CODE_IN_CAR
 	bool
 	default n
 
-config USE_INIT
-	bool
-	default n
-
 config ENABLE_APIC_EXT_ID
 	bool
 	default n

src/arch/i386/lib/console.c

@@ -1,41 +0,0 @@
-#include <build.h>
-#include <console/loglevel.h>
-
-#if CONFIG_USE_PRINTK_IN_CAR == 0
-#include "console_print.c"
-#else  /* CONFIG_USE_PRINTK_IN_CAR == 1 */
-#include <console/console.h>
-#endif /* CONFIG_USE_PRINTK_IN_CAR */
-
-void console_init(void)
-{
-	static const char console_test[] = 
-		"\r\n\r\ncoreboot-"
-		COREBOOT_VERSION
-		COREBOOT_EXTRA_VERSION
-		" "
-		COREBOOT_BUILD
-		" starting...\r\n";
-	print_info(console_test);
-}
-
-
-void post_code(u8 value)
-{
-#if !defined(CONFIG_NO_POST) || CONFIG_NO_POST==0
-#if CONFIG_SERIAL_POST==1
-	print_emerg("POST: 0x");
-	print_emerg_hex8(value);
-	print_emerg("\r\n");
-#endif
-	outb(value, 0x80);
-#endif
-}
-
-void die(const char *str)
-{
-	print_emerg(str);
-	do {
-		hlt();
-	} while(1);
-}

src/arch/i386/lib/console_print.c

@@ -1,124 +0,0 @@
-static void __console_tx_byte(unsigned char byte)
-{
-	uart_tx_byte(byte);
-}
-
-static void __console_tx_nibble(unsigned nibble)
-{
-	unsigned char digit;
-	digit = nibble + '0';
-	if (digit > '9') {
-		digit += 39;
-	}
-	__console_tx_byte(digit);
-}
-
-static void __console_tx_char(int loglevel, unsigned char byte)
-{
-	if (ASM_CONSOLE_LOGLEVEL >= loglevel) {
-		uart_tx_byte(byte);
-	}
-}
-
-static void __console_tx_hex8(int loglevel, unsigned char value)
-{
-	if (ASM_CONSOLE_LOGLEVEL >= loglevel) {
-		__console_tx_nibble((value >>  4U) & 0x0fU);
-		__console_tx_nibble(value & 0x0fU);
-	}
-}
-
-static void __console_tx_hex16(int loglevel, unsigned short value)
-{
-	if (ASM_CONSOLE_LOGLEVEL >= loglevel) {
-		__console_tx_nibble((value >> 12U) & 0x0fU);
-		__console_tx_nibble((value >>  8U) & 0x0fU);
-		__console_tx_nibble((value >>  4U) & 0x0fU);
-		__console_tx_nibble(value & 0x0fU);
-	}
-}
-
-static void __console_tx_hex32(int loglevel, unsigned int value)
-{
-	if (ASM_CONSOLE_LOGLEVEL >= loglevel) {
-		__console_tx_nibble((value >> 28U) & 0x0fU);
-		__console_tx_nibble((value >> 24U) & 0x0fU);
-		__console_tx_nibble((value >> 20U) & 0x0fU);
-		__console_tx_nibble((value >> 16U) & 0x0fU);
-		__console_tx_nibble((value >> 12U) & 0x0fU);
-		__console_tx_nibble((value >>  8U) & 0x0fU);
-		__console_tx_nibble((value >>  4U) & 0x0fU);
-		__console_tx_nibble(value & 0x0fU);
-	}
-}
-
-static void __console_tx_string(int loglevel, const char *str)
-{
-	if (ASM_CONSOLE_LOGLEVEL >= loglevel) {
-		unsigned char ch;
-		while((ch = *str++) != '\0') {
-			__console_tx_byte(ch);
-		}
-	}
-}
-
-#if defined (__ROMCC__)
-#define STATIC
-#else
-#define STATIC static
-#endif
-
-STATIC void print_emerg_char(unsigned char byte) { __console_tx_char(BIOS_EMERG, byte); }
-STATIC void print_emerg_hex8(unsigned char value){ __console_tx_hex8(BIOS_EMERG, value); }
-STATIC void print_emerg_hex16(unsigned short value){ __console_tx_hex16(BIOS_EMERG, value); }
-STATIC void print_emerg_hex32(unsigned int value) { __console_tx_hex32(BIOS_EMERG, value); }
-STATIC void print_emerg(const char *str) { __console_tx_string(BIOS_EMERG, str); }
-
-STATIC void print_alert_char(unsigned char byte) { __console_tx_char(BIOS_ALERT, byte); }
-STATIC void print_alert_hex8(unsigned char value) { __console_tx_hex8(BIOS_ALERT, value); }
-STATIC void print_alert_hex16(unsigned short value){ __console_tx_hex16(BIOS_ALERT, value); }
-STATIC void print_alert_hex32(unsigned int value) { __console_tx_hex32(BIOS_ALERT, value); }
-STATIC void print_alert(const char *str) { __console_tx_string(BIOS_ALERT, str); }
-
-STATIC void print_crit_char(unsigned char byte) { __console_tx_char(BIOS_CRIT, byte); }
-STATIC void print_crit_hex8(unsigned char value) { __console_tx_hex8(BIOS_CRIT, value); }
-STATIC void print_crit_hex16(unsigned short value){ __console_tx_hex16(BIOS_CRIT, value); }
-STATIC void print_crit_hex32(unsigned int value) { __console_tx_hex32(BIOS_CRIT, value); }
-STATIC void print_crit(const char *str) { __console_tx_string(BIOS_CRIT, str); }
-
-STATIC void print_err_char(unsigned char byte) { __console_tx_char(BIOS_ERR, byte); }
-STATIC void print_err_hex8(unsigned char value) { __console_tx_hex8(BIOS_ERR, value); }
-STATIC void print_err_hex16(unsigned short value){ __console_tx_hex16(BIOS_ERR, value); }
-STATIC void print_err_hex32(unsigned int value) { __console_tx_hex32(BIOS_ERR, value); }
-STATIC void print_err(const char *str) { __console_tx_string(BIOS_ERR, str); }
-
-STATIC void print_warning_char(unsigned char byte) { __console_tx_char(BIOS_WARNING, byte); }
-STATIC void print_warning_hex8(unsigned char value) { __console_tx_hex8(BIOS_WARNING, value); }
-STATIC void print_warning_hex16(unsigned short value){ __console_tx_hex16(BIOS_WARNING, value); }
-STATIC void print_warning_hex32(unsigned int value) { __console_tx_hex32(BIOS_WARNING, value); }
-STATIC void print_warning(const char *str) { __console_tx_string(BIOS_WARNING, str); }
-
-STATIC void print_notice_char(unsigned char byte) { __console_tx_char(BIOS_NOTICE, byte); }
-STATIC void print_notice_hex8(unsigned char value) { __console_tx_hex8(BIOS_NOTICE, value); }
-STATIC void print_notice_hex16(unsigned short value){ __console_tx_hex16(BIOS_NOTICE, value); }
-STATIC void print_notice_hex32(unsigned int value) { __console_tx_hex32(BIOS_NOTICE, value); }
-STATIC void print_notice(const char *str) { __console_tx_string(BIOS_NOTICE, str); }
-
-STATIC void print_info_char(unsigned char byte) { __console_tx_char(BIOS_INFO, byte); }
-STATIC void print_info_hex8(unsigned char value) { __console_tx_hex8(BIOS_INFO, value); }
-STATIC void print_info_hex16(unsigned short value){ __console_tx_hex16(BIOS_INFO, value); }
-STATIC void print_info_hex32(unsigned int value) { __console_tx_hex32(BIOS_INFO, value); }
-STATIC void print_info(const char *str) { __console_tx_string(BIOS_INFO, str); }
-
-STATIC void print_debug_char(unsigned char byte) { __console_tx_char(BIOS_DEBUG, byte); }
-STATIC void print_debug_hex8(unsigned char value) { __console_tx_hex8(BIOS_DEBUG, value); }
-STATIC void print_debug_hex16(unsigned short value){ __console_tx_hex16(BIOS_DEBUG, value); }
-STATIC void print_debug_hex32(unsigned int value) { __console_tx_hex32(BIOS_DEBUG, value); }
-STATIC void print_debug(const char *str) { __console_tx_string(BIOS_DEBUG, str); }
-
-STATIC void print_spew_char(unsigned char byte) { __console_tx_char(BIOS_SPEW, byte); }
-STATIC void print_spew_hex8(unsigned char value) { __console_tx_hex8(BIOS_SPEW, value); }
-STATIC void print_spew_hex16(unsigned short value){ __console_tx_hex16(BIOS_SPEW, value); }
-STATIC void print_spew_hex32(unsigned int value) { __console_tx_hex32(BIOS_SPEW, value); }
-STATIC void print_spew(const char *str) { __console_tx_string(BIOS_SPEW, str); }
-

src/console/Makefile.inc

@@ -14,3 +14,5 @@ driver-$(CONFIG_CONSOLE_VGA) += vga_console.o
 driver-$(CONFIG_CONSOLE_BTEXT) += btext_console.o
 driver-$(CONFIG_CONSOLE_BTEXT) += font-8x16.o
 driver-$(CONFIG_CONSOLE_LOGBUF) += logbuf_console.o
+
+$(obj)/console/console.o : $(obj)/build.h

src/console/console.c

@@ -2,8 +2,12 @@
  * Bootstrap code for the INTEL 
  */
 
-#include <arch/io.h>
 #include <console/console.h>
+#include <build.h>
+#include <arch/hlt.h>
+
+#ifndef __PRE_RAM__
+#include <arch/io.h>
 #include <string.h>
 #include <pc80/mc146818rtc.h>
 
@@ -86,6 +90,42 @@ void post_code(uint8_t value)
 void __attribute__((noreturn)) die(const char *msg)
 {
 	printk(BIOS_EMERG, "%s", msg);
-	post_code(0xff);
+	//post_code(0xff);
-	while (1);		/* Halt */
+ 	for (;;)
+		hlt();		/* Halt */
 }
+
+#else
+
+void console_init(void)
+{
+	static const char console_test[] = 
+		"\r\n\r\ncoreboot-"
+		COREBOOT_VERSION
+		COREBOOT_EXTRA_VERSION
+		" "
+		COREBOOT_BUILD
+		" starting...\r\n";
+	print_info(console_test);
+}
+
+void post_code(u8 value)
+{
+#if !defined(CONFIG_NO_POST) || CONFIG_NO_POST==0
+#if CONFIG_SERIAL_POST==1
+	print_emerg("POST: 0x");
+	print_emerg_hex8(value);
+	print_emerg("\r\n");
+#endif
+	outb(value, 0x80);
+#endif
+}
+
+void die(const char *str)
+{
+	print_emerg(str);
+	do {
+		hlt();
+	} while(1);
+}
+#endif

src/include/console/console.h

@@ -33,6 +33,7 @@ extern struct console_driver econsole_drivers[];
 extern int console_loglevel;
 #endif /* !__PRE_RAM__ */
 
+#ifndef __ROMCC__
 int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
 
 #undef WE_CLEANED_UP_ALL_SIDE_EFFECTS
@@ -40,6 +41,10 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf,
  * disabling cache as ram for a maximum console log level of 6 and above while
  * it worked fine without. In order to catch such issues reliably we are
  * always doing a function call to do_printk with the full number of arguments.
+ * Our favorite reason to do it this way was:
+ *   disable_car();
+ *   printk(BIOS_DEBUG, "CAR disabled\n"); // oops, garbage stack pointer
+ *   move_stack();
  * This slightly increases the code size and some unprinted strings will end
  * up in the final coreboot binary (most of them compressed). If you want to
  * avoid this, do a
@@ -66,35 +71,35 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf,
 	} while(0)
 #endif
 
-#define print_emerg(STR)   printk(BIOS_EMERG,  "%s", (STR))
+#define print_emerg(STR)         printk(BIOS_EMERG,  "%s", (STR))
-#define print_alert(STR)   printk(BIOS_ALERT,  "%s", (STR))
+#define print_alert(STR)         printk(BIOS_ALERT,  "%s", (STR))
-#define print_crit(STR)    printk(BIOS_CRIT,   "%s", (STR))
+#define print_crit(STR)          printk(BIOS_CRIT,   "%s", (STR))
-#define print_err(STR)     printk(BIOS_ERR,    "%s", (STR))
+#define print_err(STR)           printk(BIOS_ERR,    "%s", (STR))
-#define print_warning(STR) printk(BIOS_WARNING,"%s", (STR))
+#define print_warning(STR)       printk(BIOS_WARNING,"%s", (STR))
-#define print_notice(STR)  printk(BIOS_NOTICE, "%s", (STR))
+#define print_notice(STR)        printk(BIOS_NOTICE, "%s", (STR))
-#define print_info(STR)    printk(BIOS_INFO,   "%s", (STR))
+#define print_info(STR)          printk(BIOS_INFO,   "%s", (STR))
-#define print_debug(STR)   printk(BIOS_DEBUG,  "%s", (STR))
+#define print_debug(STR)         printk(BIOS_DEBUG,  "%s", (STR))
-#define print_spew(STR)    printk(BIOS_SPEW,   "%s", (STR))
+#define print_spew(STR)          printk(BIOS_SPEW,   "%s", (STR))
 
-#define print_emerg_char(CH)   printk(BIOS_EMERG,  "%c", (CH))
+#define print_emerg_char(CH)     printk(BIOS_EMERG,  "%c", (CH))
-#define print_alert_char(CH)   printk(BIOS_ALERT,  "%c", (CH))
+#define print_alert_char(CH)     printk(BIOS_ALERT,  "%c", (CH))
-#define print_crit_char(CH)    printk(BIOS_CRIT,   "%c", (CH))
+#define print_crit_char(CH)      printk(BIOS_CRIT,   "%c", (CH))
-#define print_err_char(CH)     printk(BIOS_ERR,    "%c", (CH))
+#define print_err_char(CH)       printk(BIOS_ERR,    "%c", (CH))
-#define print_warning_char(CH) printk(BIOS_WARNING,"%c", (CH))
+#define print_warning_char(CH)   printk(BIOS_WARNING,"%c", (CH))
-#define print_notice_char(CH)  printk(BIOS_NOTICE, "%c", (CH))
+#define print_notice_char(CH)    printk(BIOS_NOTICE, "%c", (CH))
-#define print_info_char(CH)    printk(BIOS_INFO,   "%c", (CH))
+#define print_info_char(CH)      printk(BIOS_INFO,   "%c", (CH))
-#define print_debug_char(CH)   printk(BIOS_DEBUG,  "%c", (CH))
+#define print_debug_char(CH)     printk(BIOS_DEBUG,  "%c", (CH))
-#define print_spew_char(CH)    printk(BIOS_SPEW,   "%c", (CH))
+#define print_spew_char(CH)      printk(BIOS_SPEW,   "%c", (CH))
 
-#define print_emerg_hex8(HEX)   printk(BIOS_EMERG,  "%02x",  (HEX))
+#define print_emerg_hex8(HEX)    printk(BIOS_EMERG,  "%02x",  (HEX))
-#define print_alert_hex8(HEX)   printk(BIOS_ALERT,  "%02x",  (HEX))
+#define print_alert_hex8(HEX)    printk(BIOS_ALERT,  "%02x",  (HEX))
-#define print_crit_hex8(HEX)    printk(BIOS_CRIT,   "%02x",  (HEX))
+#define print_crit_hex8(HEX)     printk(BIOS_CRIT,   "%02x",  (HEX))
-#define print_err_hex8(HEX)     printk(BIOS_ERR,    "%02x",  (HEX))
+#define print_err_hex8(HEX)      printk(BIOS_ERR,    "%02x",  (HEX))
-#define print_warning_hex8(HEX) printk(BIOS_WARNING,"%02x",  (HEX))
+#define print_warning_hex8(HEX)  printk(BIOS_WARNING,"%02x",  (HEX))
-#define print_notice_hex8(HEX)  printk(BIOS_NOTICE, "%02x",  (HEX))
+#define print_notice_hex8(HEX)   printk(BIOS_NOTICE, "%02x",  (HEX))
-#define print_info_hex8(HEX)    printk(BIOS_INFO,   "%02x",  (HEX))
+#define print_info_hex8(HEX)     printk(BIOS_INFO,   "%02x",  (HEX))
-#define print_debug_hex8(HEX)   printk(BIOS_DEBUG,  "%02x",  (HEX))
+#define print_debug_hex8(HEX)    printk(BIOS_DEBUG,  "%02x",  (HEX))
-#define print_spew_hex8(HEX)    printk(BIOS_SPEW,   "%02x",  (HEX))
+#define print_spew_hex8(HEX)     printk(BIOS_SPEW,   "%02x",  (HEX))
 
 #define print_emerg_hex16(HEX)   printk(BIOS_EMERG,  "%04x", (HEX))
 #define print_alert_hex16(HEX)   printk(BIOS_ALERT,  "%04x", (HEX))
@@ -115,5 +120,182 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf,
 #define print_info_hex32(HEX)    printk(BIOS_INFO,   "%08x", (HEX))
 #define print_debug_hex32(HEX)   printk(BIOS_DEBUG,  "%08x", (HEX))
 #define print_spew_hex32(HEX)    printk(BIOS_SPEW,   "%08x", (HEX))
+#else
+/* __ROMCC__ */
+static void __console_tx_byte(unsigned char byte)
+{
+	uart_tx_byte(byte);
+}
+
+static void __console_tx_nibble(unsigned nibble)
+{
+	unsigned char digit;
+	digit = nibble + '0';
+	if (digit > '9') {
+		digit += 39;
+	}
+	__console_tx_byte(digit);
+}
+
+static void __console_tx_char(int loglevel, unsigned char byte)
+{
+	if (ASM_CONSOLE_LOGLEVEL >= loglevel) {
+		uart_tx_byte(byte);
+	}
+}
+
+static void __console_tx_hex8(int loglevel, unsigned char value)
+{
+	if (ASM_CONSOLE_LOGLEVEL >= loglevel) {
+		__console_tx_nibble((value >>  4U) & 0x0fU);
+		__console_tx_nibble(value & 0x0fU);
+	}
+}
+
+static void __console_tx_hex16(int loglevel, unsigned short value)
+{
+	if (ASM_CONSOLE_LOGLEVEL >= loglevel) {
+		__console_tx_nibble((value >> 12U) & 0x0fU);
+		__console_tx_nibble((value >>  8U) & 0x0fU);
+		__console_tx_nibble((value >>  4U) & 0x0fU);
+		__console_tx_nibble(value & 0x0fU);
+	}
+}
+
+static void __console_tx_hex32(int loglevel, unsigned int value)
+{
+	if (ASM_CONSOLE_LOGLEVEL >= loglevel) {
+		__console_tx_nibble((value >> 28U) & 0x0fU);
+		__console_tx_nibble((value >> 24U) & 0x0fU);
+		__console_tx_nibble((value >> 20U) & 0x0fU);
+		__console_tx_nibble((value >> 16U) & 0x0fU);
+		__console_tx_nibble((value >> 12U) & 0x0fU);
+		__console_tx_nibble((value >>  8U) & 0x0fU);
+		__console_tx_nibble((value >>  4U) & 0x0fU);
+		__console_tx_nibble(value & 0x0fU);
+	}
+}
+
+static void __console_tx_string(int loglevel, const char *str)
+{
+	if (ASM_CONSOLE_LOGLEVEL >= loglevel) {
+		unsigned char ch;
+		while((ch = *str++) != '\0') {
+			if (ch == '\n')
+				__console_tx_byte('\r');
+			__console_tx_byte(ch);
+		}
+	}
+}
+
+#define FUNCTIONS_FOR_PRINT
+#ifdef  FUNCTIONS_FOR_PRINT
+static void print_emerg_char(unsigned char byte) { __console_tx_char(BIOS_EMERG, byte); }
+static void print_emerg_hex8(unsigned char value){ __console_tx_hex8(BIOS_EMERG, value); }
+static void print_emerg_hex16(unsigned short value){ __console_tx_hex16(BIOS_EMERG, value); }
+static void print_emerg_hex32(unsigned int value) { __console_tx_hex32(BIOS_EMERG, value); }
+static void print_emerg(const char *str) { __console_tx_string(BIOS_EMERG, str); }
+
+static void print_alert_char(unsigned char byte) { __console_tx_char(BIOS_ALERT, byte); }
+static void print_alert_hex8(unsigned char value) { __console_tx_hex8(BIOS_ALERT, value); }
+static void print_alert_hex16(unsigned short value){ __console_tx_hex16(BIOS_ALERT, value); }
+static void print_alert_hex32(unsigned int value) { __console_tx_hex32(BIOS_ALERT, value); }
+static void print_alert(const char *str) { __console_tx_string(BIOS_ALERT, str); }
+
+static void print_crit_char(unsigned char byte) { __console_tx_char(BIOS_CRIT, byte); }
+static void print_crit_hex8(unsigned char value) { __console_tx_hex8(BIOS_CRIT, value); }
+static void print_crit_hex16(unsigned short value){ __console_tx_hex16(BIOS_CRIT, value); }
+static void print_crit_hex32(unsigned int value) { __console_tx_hex32(BIOS_CRIT, value); }
+static void print_crit(const char *str) { __console_tx_string(BIOS_CRIT, str); }
+
+static void print_err_char(unsigned char byte) { __console_tx_char(BIOS_ERR, byte); }
+static void print_err_hex8(unsigned char value) { __console_tx_hex8(BIOS_ERR, value); }
+static void print_err_hex16(unsigned short value){ __console_tx_hex16(BIOS_ERR, value); }
+static void print_err_hex32(unsigned int value) { __console_tx_hex32(BIOS_ERR, value); }
+static void print_err(const char *str) { __console_tx_string(BIOS_ERR, str); }
+
+static void print_warning_char(unsigned char byte) { __console_tx_char(BIOS_WARNING, byte); }
+static void print_warning_hex8(unsigned char value) { __console_tx_hex8(BIOS_WARNING, value); }
+static void print_warning_hex16(unsigned short value){ __console_tx_hex16(BIOS_WARNING, value); }
+static void print_warning_hex32(unsigned int value) { __console_tx_hex32(BIOS_WARNING, value); }
+static void print_warning(const char *str) { __console_tx_string(BIOS_WARNING, str); }
+
+static void print_notice_char(unsigned char byte) { __console_tx_char(BIOS_NOTICE, byte); }
+static void print_notice_hex8(unsigned char value) { __console_tx_hex8(BIOS_NOTICE, value); }
+static void print_notice_hex16(unsigned short value){ __console_tx_hex16(BIOS_NOTICE, value); }
+static void print_notice_hex32(unsigned int value) { __console_tx_hex32(BIOS_NOTICE, value); }
+static void print_notice(const char *str) { __console_tx_string(BIOS_NOTICE, str); }
+
+static void print_info_char(unsigned char byte) { __console_tx_char(BIOS_INFO, byte); }
+static void print_info_hex8(unsigned char value) { __console_tx_hex8(BIOS_INFO, value); }
+static void print_info_hex16(unsigned short value){ __console_tx_hex16(BIOS_INFO, value); }
+static void print_info_hex32(unsigned int value) { __console_tx_hex32(BIOS_INFO, value); }
+static void print_info(const char *str) { __console_tx_string(BIOS_INFO, str); }
+
+static void print_debug_char(unsigned char byte) { __console_tx_char(BIOS_DEBUG, byte); }
+static void print_debug_hex8(unsigned char value) { __console_tx_hex8(BIOS_DEBUG, value); }
+static void print_debug_hex16(unsigned short value){ __console_tx_hex16(BIOS_DEBUG, value); }
+static void print_debug_hex32(unsigned int value) { __console_tx_hex32(BIOS_DEBUG, value); }
+static void print_debug(const char *str) { __console_tx_string(BIOS_DEBUG, str); }
+
+static void print_spew_char(unsigned char byte) { __console_tx_char(BIOS_SPEW, byte); }
+static void print_spew_hex8(unsigned char value) { __console_tx_hex8(BIOS_SPEW, value); }
+static void print_spew_hex16(unsigned short value){ __console_tx_hex16(BIOS_SPEW, value); }
+static void print_spew_hex32(unsigned int value) { __console_tx_hex32(BIOS_SPEW, value); }
+static void print_spew(const char *str) { __console_tx_string(BIOS_SPEW, str); }
+
+#else
+#define print_emerg(STR)         __console_tx_string(BIOS_EMERG, STR)
+#define print_alert(STR)         __console_tx_string(BIOS_ALERT, STR)
+#define print_crit(STR)          __console_tx_string(BIOS_CRIT, STR)
+#define print_err(STR)           __console_tx_string(BIOS_ERR, STR)
+#define print_warning(STR)       __console_tx_string(BIOS_WARNING, STR)
+#define print_notice(STR)        __console_tx_string(BIOS_NOTICE, STR)
+#define print_info(STR)          __console_tx_string(BIOS_INFO, STR)
+#define print_debug(STR)         __console_tx_string(BIOS_DEBUG, STR)
+#define print_spew(STR)          __console_tx_string(BIOS_SPEW, STR)
+
+#define print_emerg_char(CH)     __console_tx_char(BIOS_EMERG, CH)
+#define print_alert_char(CH)     __console_tx_char(BIOS_ALERT, CH)
+#define print_crit_char(CH)      __console_tx_char(BIOS_CRIT, CH)
+#define print_err_char(CH)       __console_tx_char(BIOS_ERR, CH)
+#define print_warning_char(CH)   __console_tx_char(BIOS_WARNING, CH)
+#define print_notice_char(CH)    __console_tx_char(BIOS_NOTICE, CH)
+#define print_info_char(CH)      __console_tx_char(BIOS_INFO, CH)
+#define print_debug_char(CH)     __console_tx_char(BIOS_DEBUG, CH)
+#define print_spew_char(CH)      __console_tx_char(BIOS_SPEW, CH)
+
+#define print_emerg_hex8(HEX)    __console_tx_hex8(BIOS_EMERG, HEX)
+#define print_alert_hex8(HEX)    __console_tx_hex8(BIOS_ALERT, HEX)
+#define print_crit_hex8(HEX)     __console_tx_hex8(BIOS_CRIT, HEX)
+#define print_err_hex8(HEX)      __console_tx_hex8(BIOS_ERR, HEX)
+#define print_warning_hex8(HEX)  __console_tx_hex8(BIOS_WARNING, HEX)
+#define print_notice_hex8(HEX)   __console_tx_hex8(BIOS_NOTICE, HEX)
+#define print_info_hex8(HEX)     __console_tx_hex8(BIOS_INFO, HEX)
+#define print_debug_hex8(HEX)    __console_tx_hex8(BIOS_DEBUG, HEX)
+#define print_spew_hex8(HEX)     __console_tx_hex8(BIOS_SPEW, HEX)
+
+#define print_emerg_hex16(HEX)   __console_tx_hex16(BIOS_EMERG, HEX)
+#define print_alert_hex16(HEX)   __console_tx_hex16(BIOS_ALERT, HEX)
+#define print_crit_hex16(HEX)    __console_tx_hex16(BIOS_CRIT, HEX)
+#define print_err_hex16(HEX)     __console_tx_hex16(BIOS_ERR, HEX)
+#define print_warning_hex16(HEX) __console_tx_hex16(BIOS_WARNING, HEX)
+#define print_notice_hex16(HEX)  __console_tx_hex16(BIOS_NOTICE, HEX)
+#define print_info_hex16(HEX)    __console_tx_hex16(BIOS_INFO, HEX)
+#define print_debug_hex16(HEX)   __console_tx_hex16(BIOS_DEBUG, HEX)
+#define print_spew_hex16(HEX)    __console_tx_hex16(BIOS_SPEW, HEX)
+
+#define print_emerg_hex32(HEX)   __console_tx_hex32(BIOS_EMERG, HEX)
+#define print_alert_hex32(HEX)   __console_tx_hex32(BIOS_ALERT, HEX)
+#define print_crit_hex32(HEX)    __console_tx_hex32(BIOS_CRIT, HEX)
+#define print_err_hex32(HEX)     __console_tx_hex32(BIOS_ERR, HEX)
+#define print_warning_hex32(HEX) __console_tx_hex32(BIOS_WARNING, HEX)
+#define print_notice_hex32(HEX)  __console_tx_hex32(BIOS_NOTICE, HEX)
+#define print_info_hex32(HEX)    __console_tx_hex32(BIOS_INFO, HEX)
+#define print_debug_hex32(HEX)   __console_tx_hex32(BIOS_DEBUG, HEX)
+#define print_spew_hex32(HEX)    __console_tx_hex32(BIOS_SPEW, HEX)
+#endif
+
+#endif
 
 #endif /* CONSOLE_CONSOLE_H_ */

src/mainboard/a-trend/atc-6220/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/a-trend/atc-6240/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/abit/be6-ii_v2_0/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/advantech/pcm-5820/romstage.c

@@ -24,7 +24,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"
 #include "cpu/x86/bist.h"

src/mainboard/amd/db800/romstage.c

@@ -24,7 +24,7 @@
 #include <device/pnp_def.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"

src/mainboard/amd/dbm690t/romstage.c

@@ -43,7 +43,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 
 #define post_code(x) outb(x, 0x80)
 

src/mainboard/amd/mahogany/romstage.c

@@ -43,7 +43,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 
 #define post_code(x) outb(x, 0x80)
 

src/mainboard/amd/mahogany_fam10/romstage.c

@@ -47,7 +47,7 @@
 #include <cpu/x86/lapic.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "pc80/serial.c"
 #include "lib/ramtest.c"
 #include <cpu/amd/model_10xxx_rev.h>

src/mainboard/amd/norwich/romstage.c

@@ -24,7 +24,7 @@
 #include <device/pnp_def.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"

src/mainboard/amd/pistachio/romstage.c

@@ -37,7 +37,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 
 #define post_code(x) outb(x, 0x80)
 

src/mainboard/amd/rumba/romstage.c

@@ -5,7 +5,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "cpu/x86/bist.h"

src/mainboard/amd/serengeti_cheetah/ap_romstage.c

@@ -23,25 +23,10 @@
 #include "pc80/serial.c"
 #include "./arch/i386/lib/printk_init.c"
 
-#if CONFIG_USE_INIT == 0
+#include "console/console.c"
-	#include "lib/memcpy.c"
-#endif
-
-#include "arch/i386/lib/console.c"
 #include "lib/uart8250.c"
 #include "console/vtxprintf.c"
 
-#if 0 
-static void post_code(uint8_t value) {
-#if 1
-        int i;
-        for(i=0;i<0x80000;i++) {
-                outb(value, 0x80);
-        }
-#endif
-}
-#endif
-
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"

src/mainboard/amd/serengeti_cheetah/romstage.c

@@ -40,7 +40,7 @@ static void post_code(uint8_t value) {
 }
 #endif
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include <cpu/amd/model_fxx_rev.h>
 #include "southbridge/amd/amd8111/amd8111_early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"

src/mainboard/amd/serengeti_cheetah_fam10/romstage.c

@@ -47,7 +47,7 @@
 #include <cpu/x86/lapic.h>
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "pc80/serial.c"
 #include "lib/ramtest.c"
 #include <cpu/amd/model_10xxx_rev.h>

src/mainboard/arima/hdama/romstage.c

@@ -8,7 +8,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 
 #include <cpu/amd/model_fxx_rev.h>

src/mainboard/artecgroup/dbe61/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"

src/mainboard/asi/mb_5blgp/romstage.c

@@ -24,7 +24,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"
 #include "cpu/x86/bist.h"

src/mainboard/asi/mb_5blmp/romstage.c

@@ -25,7 +25,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"
 #include "superio/nsc/pc87351/pc87351_early_serial.c"

src/mainboard/asus/a8n_e/romstage.c

@@ -49,7 +49,7 @@
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/amd/amdk8/incoherent_ht.c"
 #include "southbridge/nvidia/ck804/ck804_early_smbus.c"

src/mainboard/asus/a8v-e_se/romstage.c

@@ -47,7 +47,7 @@ unsigned int get_sbdn(unsigned bus);
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"

src/mainboard/asus/m2v-mx_se/romstage.c

@@ -52,7 +52,7 @@ unsigned int get_sbdn(unsigned bus);
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"

src/mainboard/asus/mew-am/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
 #include "northbridge/intel/i82810/raminit.h"

src/mainboard/asus/mew-vm/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/smsc/lpc47b272/lpc47b272_early_serial.c"
 #include "northbridge/intel/i82810/raminit.h"

src/mainboard/asus/p2b-d/romstage.c

@@ -27,7 +27,7 @@
 #include <stdlib.h>
 #include <cpu/x86/lapic.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/asus/p2b-ds/romstage.c

@@ -27,7 +27,7 @@
 #include <stdlib.h>
 #include <cpu/x86/lapic.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/asus/p2b-f/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/asus/p2b-ls/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/asus/p2b/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/asus/p3b-f/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/axus/tc320/romstage.c

@@ -25,7 +25,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"
 #include "superio/nsc/pc97317/pc97317_early_serial.c"

src/mainboard/azza/pt-6ibd/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/bcom/winnet100/romstage.c

@@ -25,7 +25,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/amd/gx1/raminit.c"
 #include "superio/nsc/pc97317/pc97317_early_serial.c"

src/mainboard/bcom/winnetp680/romstage.c

@@ -27,7 +27,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/via/cn700/raminit.h"
 #include "cpu/x86/mtrr/earlymtrr.c"

src/mainboard/biostar/m6tba/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/broadcom/blast/romstage.c

@@ -14,7 +14,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 
 #if 0

src/mainboard/compaq/deskpro_en_sff_p600/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/dell/s1850/romstage.c

@@ -8,7 +8,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
 #include "northbridge/intel/e7520/raminit.h"
@@ -170,10 +170,12 @@ static void main(unsigned long bist)
 	static const struct mem_controller mch[] = {
 		{
 			.node_id = 0,
+			/*
 			.f0 = PCI_DEV(0, 0x00, 0),
 			.f1 = PCI_DEV(0, 0x00, 1),
 			.f2 = PCI_DEV(0, 0x00, 2),
 			.f3 = PCI_DEV(0, 0x00, 3),
+			*/
 			/* the wiring on this part is really messed up */
 			/* this is my best guess so far */
 			.channel0 = {(0xa<<3)|0, (0xa<<3)|1, (0xa<<3)|2, (0xa<<3)|3, },

src/mainboard/digitallogic/adl855pc/romstage.c

@@ -12,7 +12,7 @@
 #include <stdlib.h>
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801dx/i82801dx.h"
 #include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"

src/mainboard/digitallogic/msm586seg/romstage.c

@@ -7,7 +7,7 @@
 #include <arch/hlt.h>
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 //#include "lib/delay.c"

src/mainboard/digitallogic/msm800sev/romstage.c

@@ -5,7 +5,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"

src/mainboard/eaglelion/5bcm/romstage.c

@@ -6,7 +6,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 //#include "southbridge/intel/i440bx/i440bx_early_smbus.c"
 #include "superio/nsc/pc97317/pc97317_early_serial.c"

src/mainboard/emulation/qemu-x86/romstage.c

@@ -8,7 +8,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
 #include "cpu/x86/lapic/boot_cpu.c"

src/mainboard/gigabyte/ga-6bxc/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c

@@ -45,22 +45,10 @@
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
 
-#if CONFIG_USE_INIT == 0
+#include "lib/uart8250.c"
-        #include "lib/memcpy.c"
+#include "arch/i386/lib/printk_init.c"
-#endif
+#include "console/vtxprintf.c"
-
+#include "console/console.c"
-#include "arch/i386/lib/console.c"
-
-#if 0
-static void post_code(uint8_t value) {
-#if 1
-        int i;
-        for(i=0;i<0x80000;i++) {
-                outb(value, 0x80);
-        }
-#endif
-}
-#endif
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"

src/mainboard/gigabyte/ga_2761gxdk/romstage.c

@@ -54,7 +54,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #if CONFIG_USBDEBUG_DIRECT
 #include "southbridge/sis/sis966/sis966_enable_usbdebug_direct.c"
 #include "pc80/usbdebug_direct_serial.c"

src/mainboard/gigabyte/m57sli/ap_romstage.c

@@ -43,22 +43,10 @@
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
 
-#if CONFIG_USE_INIT == 0
+#include "lib/uart8250.c"
-        #include "lib/memcpy.c"
+#include "arch/i386/lib/printk_init.c"
-#endif
+#include "console/vtxprintf.c"
-
+#include "console/console.c"
-#include "arch/i386/lib/console.c"
-
-#if 0 
-static void post_code(uint8_t value) {
-#if 1
-        int i;
-        for(i=0;i<0x80000;i++) {
-                outb(value, 0x80);
-        }
-#endif
-}
-#endif
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"

src/mainboard/gigabyte/m57sli/romstage.c

@@ -52,7 +52,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #if CONFIG_USBDEBUG_DIRECT
 #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
 #include "pc80/usbdebug_direct_serial.c"

src/mainboard/hp/dl145_g3/romstage.c

@@ -58,7 +58,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 
 #include <cpu/amd/model_fxx_rev.h>

src/mainboard/hp/e_vectra_p2706t/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 /* TODO: It's a PC87364 actually! */
 #include "superio/nsc/pc87360/pc87360_early_serial.c"

src/mainboard/ibm/e325/romstage.c

@@ -10,7 +10,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 
 #include <cpu/amd/model_fxx_rev.h>

src/mainboard/ibm/e326/romstage.c

@@ -10,7 +10,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 
 #include <cpu/amd/model_fxx_rev.h>

src/mainboard/iei/juki-511p/romstage.c

@@ -25,7 +25,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/winbond/w83977f/w83977f_early_serial.c"
 #include "southbridge/amd/cs5530/cs5530_enable_rom.c"

src/mainboard/iei/nova4899r/romstage.c

@@ -25,7 +25,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/winbond/w83977tf/w83977tf_early_serial.c"
 #include "southbridge/amd/cs5530/cs5530_enable_rom.c"

src/mainboard/iei/pcisa-lx-800-r10/romstage.c

@@ -24,7 +24,7 @@
 #include <device/pnp_def.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"

src/mainboard/intel/d945gclf/romstage.c

@@ -38,7 +38,7 @@
 
 #include <console/console.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include <cpu/x86/bist.h>
 
 #if CONFIG_USBDEBUG_DIRECT

src/mainboard/intel/eagleheights/romstage.c

@@ -33,7 +33,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include <cpu/x86/bist.h>
 
 #include "lib/ramtest.c"

src/mainboard/intel/jarrell/romstage.c

@@ -8,7 +8,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
 #include "northbridge/intel/e7520/raminit.h"
@@ -60,10 +60,12 @@ static void main(unsigned long bist)
 	static const struct mem_controller mch[] = {
 		{
 			.node_id = 0,
+			/*
 			.f0 = PCI_DEV(0, 0x00, 0),
 			.f1 = PCI_DEV(0, 0x00, 1),
 			.f2 = PCI_DEV(0, 0x00, 2),
 			.f3 = PCI_DEV(0, 0x00, 3),
+			*/
 			.channel0 = { (0xa<<3)|2, (0xa<<3)|1, (0xa<<3)|0, 0 },
 			.channel1 = { (0xa<<3)|6, (0xa<<3)|5, (0xa<<3)|4, 0 },
 		}

src/mainboard/intel/mtarvon/romstage.c

@@ -28,7 +28,7 @@
 #include <cpu/x86/lapic.h>
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i3100/i3100_early_smbus.c"
 #include "southbridge/intel/i3100/i3100_early_lpc.c"

src/mainboard/intel/truxton/romstage.c

@@ -29,7 +29,7 @@
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
 #include "pc80/udelay_io.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i3100/i3100_early_smbus.c"
 #include "southbridge/intel/i3100/i3100_early_lpc.c"

src/mainboard/intel/xe7501devkit/romstage.c

@@ -9,7 +9,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801cx/i82801cx_early_smbus.c"
 #include "northbridge/intel/e7501/raminit.h"

src/mainboard/iwill/dk8_htx/romstage.c

@@ -30,7 +30,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include <cpu/amd/model_fxx_rev.h>
 #include "southbridge/amd/amd8111/amd8111_early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"

src/mainboard/iwill/dk8s2/romstage.c

@@ -30,7 +30,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include <cpu/amd/model_fxx_rev.h>
 #include "southbridge/amd/amd8111/amd8111_early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"

src/mainboard/iwill/dk8x/romstage.c

@@ -30,7 +30,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include <cpu/amd/model_fxx_rev.h>
 #include "southbridge/amd/amd8111/amd8111_early_smbus.c"
 #include "northbridge/amd/amdk8/raminit.h"

src/mainboard/jetway/j7f24/romstage.c

@@ -27,7 +27,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/via/cn700/raminit.h"
 #include "cpu/x86/mtrr/earlymtrr.c"

src/mainboard/kontron/986lcd-m/romstage.c

@@ -47,7 +47,7 @@
 
 #include <console/console.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include <cpu/x86/bist.h>
 
 #if CONFIG_USBDEBUG_DIRECT

src/mainboard/kontron/kt690/romstage.c

@@ -44,7 +44,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 
 #define post_code(x) outb(x, 0x80)
 

src/mainboard/lippert/frontrunner/romstage.c

@@ -5,7 +5,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "cpu/x86/bist.h"

src/mainboard/lippert/roadrunner-lx/romstage.c

@@ -28,7 +28,7 @@
 #include <device/pnp_def.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"

src/mainboard/lippert/spacerunner-lx/romstage.c

@@ -29,7 +29,7 @@
 #include <device/pnp_def.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"

src/mainboard/mitac/6513wu/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
 #include "northbridge/intel/i82810/raminit.h"

src/mainboard/msi/ms6119/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/msi/ms6147/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/msi/ms6156/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/msi/ms6178/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "northbridge/intel/i82810/raminit.h"

src/mainboard/msi/ms7135/romstage.c

@@ -51,7 +51,7 @@
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/amd/amdk8/incoherent_ht.c"
 #include "southbridge/nvidia/ck804/ck804_early_smbus.c"

src/mainboard/msi/ms7260/ap_romstage.c

@@ -39,10 +39,8 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#if CONFIG_USE_INIT == 0
+
-#include "lib/memcpy.c"
+#include "console/console.c"
-#endif
-#include "arch/i386/lib/console.c"
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"

src/mainboard/msi/ms7260/romstage.c

@@ -56,7 +56,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #if CONFIG_USBDEBUG_DIRECT
 #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
 #include "pc80/usbdebug_direct_serial.c"

src/mainboard/msi/ms9185/romstage.c

@@ -50,7 +50,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 
 #if 0
 static void post_code(uint8_t value) {

src/mainboard/msi/ms9282/romstage.c

@@ -45,7 +45,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c"

src/mainboard/msi/ms9652_fam10/romstage.c

@@ -46,7 +46,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #if CONFIG_USBDEBUG_DIRECT
 #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
 #include "pc80/usbdebug_direct_serial.c"

src/mainboard/nec/powermate2000/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
 #include "northbridge/intel/i82810/raminit.h"

src/mainboard/newisys/khepri/romstage.c

@@ -15,7 +15,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 
 #if 0

src/mainboard/nvidia/l1_2pvv/ap_romstage.c

@@ -43,22 +43,10 @@
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
 
-#if CONFIG_USE_INIT == 0
+#include "lib/uart8250.c"
-	#include "lib/memcpy.c"
+#include "arch/i386/lib/printk_init.c"
-#endif
+#include "console/vtxprintf.c"
-
+#include "console/console.c"
-#include "arch/i386/lib/console.c"
-
-#if 0
-static void post_code(uint8_t value) {
-#if 1
-	int i;
-	for(i=0;i<0x80000;i++) {
-		outb(value, 0x80);
-	}
-#endif
-}
-#endif
 
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"

src/mainboard/nvidia/l1_2pvv/romstage.c

@@ -52,7 +52,7 @@
 #include "pc80/mc146818rtc_early.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #if CONFIG_USBDEBUG_DIRECT
 #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c"
 #include "pc80/usbdebug_direct_serial.c"

src/mainboard/olpc/btest/romstage.c

@@ -5,7 +5,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "cpu/x86/bist.h"

src/mainboard/olpc/rev_a/romstage.c

@@ -5,7 +5,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "cpu/x86/bist.h"

src/mainboard/pcengines/alix1c/romstage.c

@@ -25,7 +25,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"

src/mainboard/rca/rm4100/romstage.c

@@ -27,7 +27,7 @@
 #include <arch/hlt.h>
 #include "pc80/serial.c"
 #include "pc80/udelay_io.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
 #include "northbridge/intel/i82830/raminit.h"

src/mainboard/roda/rk886ex/romstage.c

@@ -40,7 +40,7 @@
 
 #include <console/console.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include <cpu/x86/bist.h>
 
 #if CONFIG_USBDEBUG_DIRECT

src/mainboard/soyo/sy-6ba-plus-iii/romstage.c

@@ -26,7 +26,7 @@
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"

src/mainboard/sunw/ultra40/romstage.c

@@ -17,7 +17,7 @@
 #include "option_table.h"
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 
 #include <cpu/amd/model_fxx_rev.h>

src/mainboard/supermicro/h8dme/ap_romstage.c

@@ -43,26 +43,11 @@
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
 
-#if CONFIG_USE_INIT == 0
+#include "console/console.c"
-        #include "lib/memcpy.c"
-#endif
-
-#include "arch/i386/lib/console.c"
 #include "lib/uart8250.c"
 #include "console/vtxprintf.c"
 #include "./arch/i386/lib/printk_init.c"
 
-#if 0 
-static void post_code(uint8_t value) {
-#if 1
-        int i;
-        for(i=0;i<0x80000;i++) {
-                outb(value, 0x80);
-        }
-#endif
-}
-#endif
-
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"

src/mainboard/supermicro/h8dme/romstage.c

@@ -50,7 +50,7 @@
 #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c"
 
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 
 #include <cpu/amd/model_fxx_rev.h>

src/mainboard/supermicro/h8dmr/ap_romstage.c

@@ -43,26 +43,11 @@
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
 
-#if CONFIG_USE_INIT == 0
+#include "console/console.c"
-        #include "lib/memcpy.c"
-#endif
-
-#include "arch/i386/lib/console.c"
 #include "lib/uart8250.c"
 #include "console/vtxprintf.c"
 #include "./arch/i386/lib/printk_init.c"
 
-#if 0 
-static void post_code(uint8_t value) {
-#if 1
-        int i;
-        for(i=0;i<0x80000;i++) {
-                outb(value, 0x80);
-        }
-#endif
-}
-#endif
-
 #include <cpu/amd/model_fxx_rev.h>
 #include "northbridge/amd/amdk8/raminit.h"
 #include "cpu/amd/model_fxx/apic_timer.c"