sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

google/fizz: Enable cr50 over SPI

Browse Source 
By default disabled.  Will need to add
FIZZ_USE_SPI_TPM config to enable.

BUG=b:62456589, b:35775024
BRANCH=None
TEST=Reboot and ensure that TPM works in verstage
CQ-DEPEND=CL:530184

Change-Id: I14ce73a1c3745c996b79c4d4758ca744e63a46b4
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://review.coreboot.org/20134
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Shelley Chen
2017-06-09 13:05:29 -07:00
committed by Martin Roth
parent db287aad25
commit 5aa64b97db
4 changed files with 59 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/mainboard/google/fizz/mainboard.c
View File

@@ -33,6 +33,12 @@ static void mainboard_enable(device_t dev)
dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator;
/* Disable unused interface for TPM. */
if (!IS_ENABLED(CONFIG_FIZZ_USE_SPI_TPM)) {
tpm = PCH_DEV_GSPI0;
if (tpm)
tpm->enabled = 0;
}
if (!IS_ENABLED(CONFIG_FIZZ_USE_I2C_TPM)) {
tpm = PCH_DEV_I2C1;
if (tpm)