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southbridge: Drop print_ implementation from non-romcc boards

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Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the southbridge code to use printk() on all non-ROMCC
boards.

Change-Id: I312406257e66bbdc3940e206b5256460559a2c98
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8110
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Stefan Reinauer
2015-01-05 13:01:01 -08:00
committed by Stefan Reinauer
parent 65b72ab55d
commit 5ab52ddc3d
41 changed files with 143 additions and 181 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/southbridge/amd/amd8111/early_smbus.c
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@@ -23,7 +23,7 @@ static void enable_smbus(void)
/* clear any lingering errors, so the transaction will run */
outw(inw(SMBUS_IO_BASE + SMBGSTATUS), SMBUS_IO_BASE + SMBGSTATUS);
print_spew("SMBus controller enabled\n");
printk(BIOS_SPEW, "SMBus controller enabled\n");
}
static inline int smbus_recv_byte(unsigned device)

12
src/southbridge/amd/cs5535/early_setup.c
View File

@@ -127,19 +127,19 @@ static void cs5535_early_setup(void)
msr = rdmsr(GLCP_SYS_RSTPLL);
if (msr.lo & (0x3f << 26)) {
/* PLL is already set and we are reboot from PLL reset */
print_debug("reboot from BIOS reset\n");
printk(BIOS_DEBUG, "reboot from BIOS reset\n");
return;
}
print_debug("Setup idsel\n");
printk(BIOS_DEBUG, "Setup idsel\n");
cs5535_setup_idsel();
print_debug("Setup iobase\n");
printk(BIOS_DEBUG, "Setup iobase\n");
cs5535_usb_swapsif();
cs5535_setup_iobase();
print_debug("Setup gpio\n");
printk(BIOS_DEBUG, "Setup gpio\n");
cs5535_setup_gpio();
print_debug("Setup cis_mode\n");
printk(BIOS_DEBUG, "Setup cis_mode\n");
cs5535_setup_cis_mode();
print_debug("Setup smbus\n");
printk(BIOS_DEBUG, "Setup smbus\n");
cs5535_enable_smbus();
dummy();
}

12
src/southbridge/amd/cs5536/early_setup.c
View File

@@ -258,18 +258,18 @@ static void cs5536_early_setup(void)
msr = rdmsr(GLCP_SYS_RSTPLL);
if (msr.lo & (0x3f << 26)) {
/* PLL is already set and we are reboot from PLL reset */
//print_debug("reboot from BIOS reset\n");
//printk(BIOS_DEBUG, "reboot from BIOS reset\n");
return;
}
//print_debug("Setup idsel\n");
//printk(BIOS_DEBUG, "Setup idsel\n");
cs5536_setup_idsel();
//print_debug("Setup iobase\n");
//printk(BIOS_DEBUG, "Setup iobase\n");
cs5536_usb_swapsif();
cs5536_setup_iobase();
//print_debug("Setup gpio\n");
//printk(BIOS_DEBUG, "Setup gpio\n");
cs5536_setup_gpio();
//print_debug("Setup smbus\n");
//printk(BIOS_DEBUG, "Setup smbus\n");
cs5536_enable_smbus();
//print_debug("Setup power button\n");
//printk(BIOS_DEBUG, "Setup power button\n");
cs5536_setup_power_button();
}

6
src/southbridge/amd/cs5536/smbus.c
View File

@@ -182,11 +182,7 @@ unsigned char do_smbus_read_byte(unsigned smbus_io_base,
return smbus_get_result(smbus_io_base);
err:
print_debug("SMBUS READ ERROR:");
print_debug_hex8(error);
print_debug(" device:");
print_debug_hex8(device);
print_debug("\n");
printk(BIOS_DEBUG, "SMBUS READ ERROR: %02x device: %02x\n", error, device);
/* stop, clean up the error, and leave */
smbus_stop_condition(smbus_io_base);
outb(inb(smbus_io_base + SMB_STS), smbus_io_base + SMB_STS);