cpu/intel/car/p3: Use variable MTRR count

Change-Id: I323426e0d9ddee1be72d15702fee4f92c7b348cc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/27098
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki
2018-06-14 06:21:53 +03:00
parent 54d6a288df
commit 5bc46d8318

View File

@@ -29,19 +29,32 @@
cache_as_ram: cache_as_ram:
post_code(0x20) post_code(0x20)
/* Zero out all fixed range and variable range MTRRs. */ /* Clear/disable fixed MTRRs */
movl $mtrr_table, %esi mov $fixed_mtrr_list_size, %ebx
movl $((mtrr_table_end - mtrr_table) >> 1), %edi xor %eax, %eax
xorl %eax, %eax xor %edx, %edx
xorl %edx, %edx
clear_mtrrs:
movw (%esi), %bx
movzx %bx, %ecx
wrmsr
add $2, %esi
dec %edi
jnz clear_mtrrs
clear_fixed_mtrr:
add $-2, %ebx
movzwl fixed_mtrr_list(%ebx), %ecx
wrmsr
jnz clear_fixed_mtrr
/* Figure put how many MTRRs we have, and clear them out */
mov $MTRR_CAP_MSR, %ecx
rdmsr
movzb %al, %ebx /* Number of variable MTRRs */
mov $MTRR_PHYS_BASE(0), %ecx
xor %eax, %eax
xor %edx, %edx
clear_var_mtrr:
wrmsr
inc %ecx
wrmsr
inc %ecx
dec %ebx
jnz clear_var_mtrr
post_code(0x21) post_code(0x21)
/* Configure the default memory type to uncacheable. */ /* Configure the default memory type to uncacheable. */
@@ -267,15 +280,16 @@ __main:
hlt hlt
jmp .Lhlt jmp .Lhlt
mtrr_table: fixed_mtrr_list:
/* Fixed MTRRs */ .word MTRR_FIX_64K_00000
.word 0x250, 0x258, 0x259 .word MTRR_FIX_16K_80000
.word 0x268, 0x269, 0x26A .word MTRR_FIX_16K_A0000
.word 0x26B, 0x26C, 0x26D .word MTRR_FIX_4K_C0000
.word 0x26E, 0x26F .word MTRR_FIX_4K_C8000
/* Variable MTRRs */ .word MTRR_FIX_4K_D0000
.word 0x200, 0x201, 0x202, 0x203 .word MTRR_FIX_4K_D8000
.word 0x204, 0x205, 0x206, 0x207 .word MTRR_FIX_4K_E0000
.word 0x208, 0x209, 0x20A, 0x20B .word MTRR_FIX_4K_E8000
.word 0x20C, 0x20D, 0x20E, 0x20F .word MTRR_FIX_4K_F0000
mtrr_table_end: .word MTRR_FIX_4K_F8000
fixed_mtrr_list_size = . - fixed_mtrr_list