google/kukui: Get write protection status from WP GPIO
Write protection (get_write_protect_state) was hard-coded to 0 and should be fixed to read from correct GPIO (PERIPHERAL_EN0 from schematics). BUG=b:130681408 TEST=make -j; boots on Kukui Rev2. BRANCH=None Change-Id: I75b98b1d587abe5e8cdf3df28ea661bc1ffa19f9 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32336 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: You-Cheng Syu <youcheng@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Joel Kitching <kitching@google.com>
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committed by
Julius Werner
parent
0873e27720
commit
5c1fadbf0f
@ -22,6 +22,7 @@
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void setup_chromeos_gpios(void)
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void setup_chromeos_gpios(void)
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{
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{
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gpio_input(GPIO_WP);
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gpio_input_pullup(EC_IN_RW);
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gpio_input_pullup(EC_IN_RW);
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gpio_input_pullup(EC_IRQ);
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gpio_input_pullup(EC_IRQ);
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gpio_input_pullup(CR50_IRQ);
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gpio_input_pullup(CR50_IRQ);
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@ -31,6 +32,8 @@ void setup_chromeos_gpios(void)
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void fill_lb_gpios(struct lb_gpios *gpios)
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void fill_lb_gpios(struct lb_gpios *gpios)
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{
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{
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struct lb_gpio chromeos_gpios[] = {
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struct lb_gpio chromeos_gpios[] = {
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{GPIO_WP.id, ACTIVE_LOW,
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!get_write_protect_state(), "write protect"},
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{-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
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{-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
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{EC_IN_RW.id, ACTIVE_HIGH, -1, "EC in RW"},
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{EC_IN_RW.id, ACTIVE_HIGH, -1, "EC in RW"},
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{EC_IRQ.id, ACTIVE_LOW, -1, "EC interrupt"},
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{EC_IRQ.id, ACTIVE_LOW, -1, "EC interrupt"},
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@ -41,7 +44,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
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int get_write_protect_state(void)
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int get_write_protect_state(void)
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{
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{
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return 0;
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return !gpio_get(GPIO_WP);
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}
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}
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int tis_plat_irq_status(void)
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int tis_plat_irq_status(void)
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@ -18,6 +18,7 @@
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#include <soc/gpio.h>
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#include <soc/gpio.h>
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#define GPIO_WP GPIO(PERIPHERAL_EN0)
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#define EC_IRQ GPIO(PERIPHERAL_EN1)
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#define EC_IRQ GPIO(PERIPHERAL_EN1)
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#define EC_IN_RW GPIO(PERIPHERAL_EN14)
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#define EC_IN_RW GPIO(PERIPHERAL_EN14)
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#define CR50_IRQ GPIO(PERIPHERAL_EN3)
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#define CR50_IRQ GPIO(PERIPHERAL_EN3)
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