Add support for Intel Sandybridge CPU

Change-Id: I9f37e291c00c0640c6600d8fdd6dcc13c3e5b8d5
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/855
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

src/cpu/intel/socket_rPGA989/Kconfig

@@ -0,0 +1,16 @@
+config CPU_INTEL_SOCKET_RPGA989
+	bool
+
+if CPU_INTEL_SOCKET_RPGA989
+
+config SOCKET_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select MMX
+	select SSE
+	select CACHE_AS_RAM
+
+config CACHE_MRC_BIN
+	bool
+	default n
+
+endif

src/cpu/intel/socket_rPGA989/Makefile.inc

@@ -0,0 +1,8 @@
+ramstage-y += socket_rPGA989.c
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../turbo

src/cpu/intel/socket_rPGA989/chip.h

@@ -0,0 +1,4 @@
+extern struct chip_operations cpu_intel_socket_rPGA989_ops;
+
+struct cpu_intel_socket_rPGA989_config {
+};

src/cpu/intel/socket_rPGA989/socket_rPGA989.c

@@ -0,0 +1,6 @@
+#include <device/device.h>
+#include "chip.h"
+
+struct chip_operations cpu_intel_socket_rPGA989_ops = {
+	CHIP_NAME("Socket rPGA989 CPU")
+};