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Skylake: Only support UART2 as debug port, clean up the rest

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On Skylake, only UART2 is supported as debug port and the macros
INTEL_PCH_UART_CONSOLE_NUMBER, INTEL_PCH_UART_CONSOLE and the partial
code for UART0, 1 are cleaned up for Skylake and Sklrvp, Kunimitsu and
Glados boards.

BRANCH=none
BUG=chrome-os-partner:40857
TEST=Built for kunimitsu, checked the coreboot logs on LPSS UART2

Change-Id: I2fbcfb1d1ca6f59309a77c67d022cf4f5da7f7c0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e714c18d462bc7bdd7068309fb6be77da6973642
Original-Change-Id: I9343abd90ce685ea2d676047dccbefad7457b69f
Original-Signed-off-by: Naveen Krishna Chatradhi <naveenkrishna.ch@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/285793
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Wenkai Du <wenkai.du@intel.com>
Original-Tested-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: http://review.coreboot.org/10994
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Naveen Krishna Chatradhi
2015-07-15 16:02:25 +05:30
committed by Patrick Georgi
parent bbbfbf2e0f
commit 5c56ce13f4
7 changed files with 10 additions and 59 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
src/soc/intel/skylake/Kconfig
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@@ -17,6 +17,7 @@ config CPU_SPECIFIC_OPTIONS
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select CACHE_ROM
select CAR_MIGRATION
select CONSOLE_SERIAL8250MEM
select COLLECT_TIMESTAMPS
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select CPU_MICROCODE_IN_CBFS
@@ -24,6 +25,7 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_HARD_RESET
select HAVE_MONOTONIC_TIMER
select HAVE_SMI_HANDLER
select HAVE_UART_MEMORY_MAPPED
select IOAPIC
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
@@ -160,18 +162,6 @@ config IFD_PLATFORM_SECTION
string
default ""
config INTEL_PCH_UART_CONSOLE
bool "Use Serial IO UART for console"
default n
select HAVE_UART_MEMORY_MAPPED
select CONSOLE_SERIAL8250MEM
depends on !CONFIG_DRIVERS_OXFORD_OXPCIE
config INTEL_PCH_UART_CONSOLE_NUMBER
hex "Serial IO UART number to use for console"
default "0x0"
depends on INTEL_PCH_UART_CONSOLE
config ME_BIN_PATH
string "Path to management engine firmware"
depends on HAVE_ME_BIN
@@ -222,7 +212,6 @@ config SMM_TSEG_SIZE
config TTYS0_BASE
hex
default 0xfe034000
depends on INTEL_PCH_UART_CONSOLE
config VGA_BIOS_ID
string