soc/intel/quark: Switch to using serial routines for FSP

Switch from passing FSP the serial port address to passing FSP the
serial port output routine.  This enables coreboot to use any UART in
the system and also log the FSP output.

TEST=Build and run on Galileo Gen2

Change-Id: I67d820ea0360a3188480455dd2595be7f2debd5c
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16105
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Lee Leahy
2016-08-06 09:51:35 -07:00
parent 00a38a4a9e
commit 5e07a7e474
4 changed files with 41 additions and 16 deletions

View File

@@ -53,7 +53,7 @@ struct FSP_M_CONFIG {
/** Offset 0x0048 - SerialPortBaseAddress
Debug serial port base address set by BIOS. Zero disables debug serial output.
**/
uint32_t SerialPortBaseAddress;
uint32_t Reserved_48;
/** Offset 0x004C - tRAS
ACT to PRE command period in picoseconds.
@@ -199,6 +199,18 @@ struct FSP_M_CONFIG {
uint32_t MrcDataLength;
/** Offset 0x0080
**/
uint32_t SerialPortPollForChar;
/** Offset 0x0084
**/
uint32_t SerialPortReadChar;
/** Offset 0x0088
**/
uint32_t SerialPortWriteChar;
/** Offset 0x008C
**/
uint16_t UpdTerminator;
} __attribute__((packed));