device_ops: add device_t argument to acpi_fill_ssdt_generator

`device_t device` is missing as argument. Every device_op function
should have a `device_t device` argument.

Change-Id: I7fca8c3fa15c1be672e50e4422d7ac8e4aaa1e36
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/9598
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/northbridge/amd/agesa/family12/northbridge.c

@@ -811,7 +811,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest)
 	return (unsigned long)current;
 }
 
-static void northbridge_fill_ssdt_generator(void)
+static void northbridge_fill_ssdt_generator(device_t device)
 {
 	msr_t msr;
 	char pscope[] = "\\_SB.PCI0";

src/northbridge/amd/agesa/family14/northbridge.c

@@ -793,7 +793,7 @@ static void cpu_bus_init(device_t dev)
 
 /* North Bridge Structures */
 
-static void northbridge_fill_ssdt_generator(void)
+static void northbridge_fill_ssdt_generator(device_t device)
 {
 	msr_t msr;
 	char pscope[] = "\\_SB.PCI0";

src/northbridge/amd/agesa/family15/northbridge.c

@@ -502,7 +502,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest)
 	return (unsigned long)current;
 }
 
-static void northbridge_fill_ssdt_generator(void)
+static void northbridge_fill_ssdt_generator(device_t device)
 {
 	msr_t msr;
 	char pscope[] = "\\_SB.PCI0";

src/northbridge/amd/agesa/family15rl/northbridge.c

@@ -477,7 +477,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest)
 	return (unsigned long)current;
 }
 
-static void northbridge_fill_ssdt_generator(void)
+static void northbridge_fill_ssdt_generator(device_t device)
 {
 	msr_t msr;
 	char pscope[] = "\\_SB.PCI0";

src/northbridge/amd/agesa/family15tn/northbridge.c

@@ -477,7 +477,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest)
 	return (unsigned long)current;
 }
 
-static void northbridge_fill_ssdt_generator(void)
+static void northbridge_fill_ssdt_generator(device_t device)
 {
 	msr_t msr;
 	char pscope[] = "\\_SB.PCI0";

src/northbridge/amd/agesa/family16kb/northbridge.c

@@ -477,7 +477,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest)
 	return (unsigned long)current;
 }
 
-static void northbridge_fill_ssdt_generator(void)
+static void northbridge_fill_ssdt_generator(device_t device)
 {
 	msr_t msr;
 	char pscope[] = "\\_SB.PCI0";

src/northbridge/amd/amdfam10/acpi.c

@@ -196,7 +196,7 @@ void update_ssdtx(void *ssdtx, int i)
 
 }
 
-void northbridge_acpi_write_vars(void)
+void northbridge_acpi_write_vars(device_t device)
 {
 	/*
 	 * If more than one physical CPU is installed, northbridge_acpi_write_vars()

src/northbridge/amd/amdfam10/amdfam10.h

@@ -1076,6 +1076,6 @@ struct acpi_rsdp;
 
 unsigned long northbridge_write_acpi_tables(unsigned long start,
 					    struct acpi_rsdp *rsdp);
-void northbridge_acpi_write_vars(void);
+void northbridge_acpi_write_vars(device_t device);
 
 #endif /* AMDFAM10_H */

src/northbridge/amd/amdk8/acpi.c

@@ -277,7 +277,7 @@ static void k8acpi_write_pci_data(int dlen, const char *name, int offset) {
 	acpigen_pop_len();
 }
 
-void k8acpi_write_vars(void)
+void k8acpi_write_vars(device_t device)
 {
 	msr_t msr;
 	char pscope[] = "\\_SB.PCI0";

src/northbridge/amd/amdk8/acpi.h

@@ -21,7 +21,7 @@
 #define AMDK8_ACPI_H
 #include <arch/acpigen.h>
 
-void k8acpi_write_vars(void);
+void k8acpi_write_vars(device_t device);
 unsigned long northbridge_write_acpi_tables(unsigned long start, acpi_rsdp_t *rsdp);
 
 #endif

src/northbridge/amd/pi/00630F01/northbridge.c

@@ -471,7 +471,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest)
 	return (unsigned long)current;
 }
 
-static void northbridge_fill_ssdt_generator(void)
+static void northbridge_fill_ssdt_generator(device_t device)
 {
 	msr_t msr;
 	char pscope[] = "\\_SB.PCI0";

src/northbridge/amd/pi/00730F01/northbridge.c

@@ -465,7 +465,7 @@ static unsigned long acpi_fill_hest(acpi_hest_t *hest)
 	return (unsigned long)current;
 }
 
-static void northbridge_fill_ssdt_generator(void)
+static void northbridge_fill_ssdt_generator(device_t device)
 {
 	msr_t msr;
 	char pscope[] = "\\_SB.PCI0";

src/northbridge/intel/fsp_rangeley/acpi.c

@@ -65,7 +65,7 @@ unsigned long acpi_fill_mcfg(unsigned long current)
 	return current;
 }
 
-void northbridge_acpi_fill_ssdt_generator(void)
+void northbridge_acpi_fill_ssdt_generator(device_t device)
 {
 	u32 bmbound;
 	char pscope[] = "\\_SB.PCI0";
@@ -74,5 +74,5 @@ void northbridge_acpi_fill_ssdt_generator(void)
 	acpigen_write_scope(pscope);
 	acpigen_write_name_dword("BMBD", bmbound);
 	acpigen_pop_len();
-	generate_cpu_entries();
+	generate_cpu_entries(device);
 }

src/northbridge/intel/fsp_rangeley/northbridge.h

@@ -27,6 +27,9 @@
 /* Everything below this line is ignored in the DSDT */
 #ifndef __ACPI__
 
+#include <rules.h>
+#include <device/device.h>
+
 /* Device 0:0.0 PCI configuration space (Host Bridge) */
 
 /* SideBand B-UNIT */
@@ -72,7 +75,10 @@ void dump_pci_devices(void);
 void dump_spd_registers(void);
 void dump_mem(unsigned start, unsigned end);
 void report_platform_info(void);
-void northbridge_acpi_fill_ssdt_generator(void);
+
+#if ENV_RAMSTAGE
+void northbridge_acpi_fill_ssdt_generator(device_t device);
+#endif
 
 #endif /* #ifndef __ASSEMBLER__ */
 #endif /* #ifndef __ACPI__ */

src/northbridge/intel/fsp_sandybridge/gma.c

@@ -74,7 +74,7 @@ intel_gma_get_controller_info(void)
 	return &chip->gfx;
 }
 
-static void gma_ssdt(void)
+static void gma_ssdt(device_t device)
 {
 	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 	if (!gfx) {

src/northbridge/intel/gm45/gma.c

@@ -502,7 +502,7 @@ intel_gma_get_controller_info(void)
 	return &chip->gfx;
 }
 
-static void gma_ssdt(void)
+static void gma_ssdt(device_t device)
 {
 	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 	if (!gfx) {

src/northbridge/intel/haswell/gma.c

@@ -498,7 +498,7 @@ intel_gma_get_controller_info(void)
 	return &chip->gfx;
 }
 
-static void gma_ssdt(void)
+static void gma_ssdt(device_t device)
 {
 	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 	if (!gfx) {

src/northbridge/intel/i945/gma.c

@@ -499,7 +499,7 @@ intel_gma_get_controller_info(void)
 	return &chip->gfx;
 }
 
-static void gma_ssdt(void)
+static void gma_ssdt(device_t device)
 {
 	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 	if (!gfx) {

src/northbridge/intel/nehalem/gma.c

@@ -1082,7 +1082,7 @@ intel_gma_get_controller_info(void)
 	return &chip->gfx;
 }
 
-static void gma_ssdt(void)
+static void gma_ssdt(device_t device)
 {
 	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 	if (!gfx) {

src/northbridge/intel/sandybridge/gma.c

@@ -624,7 +624,7 @@ intel_gma_get_controller_info(void)
 	return &chip->gfx;
 }
 
-static void gma_ssdt(void)
+static void gma_ssdt(device_t device)
 {
 	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 	if (!gfx) {

src/northbridge/intel/sch/gma.c

@@ -57,7 +57,7 @@ intel_gma_get_controller_info(void)
 	return &chip->gfx;
 }
 
-static void gma_ssdt(void)
+static void gma_ssdt(device_t device)
 {
 	const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
 	if (!gfx) {