libpayload: usb: Fix spacing issues
Found by: find payloads/libpayload/drivers/usb -type f -name "*.[ch]" | xargs \ util/lint/checkpatch.pl --types SPACING -q --fix-inplace -f Change-Id: Id23e2e573e475c6d795812a4b2df9aeffbcaaaf4 Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66596 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Yidi Lin
Martin Roth
@@ -34,30 +34,30 @@
|
||||
#include "uhci.h"
|
||||
#include "uhci_private.h"
|
||||
|
||||
static void uhci_start (hci_t *controller);
|
||||
static void uhci_stop (hci_t *controller);
|
||||
static void uhci_reset (hci_t *controller);
|
||||
static void uhci_shutdown (hci_t *controller);
|
||||
static int uhci_bulk (endpoint_t *ep, int size, u8 *data, int finalize);
|
||||
static int uhci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq,
|
||||
static void uhci_start(hci_t *controller);
|
||||
static void uhci_stop(hci_t *controller);
|
||||
static void uhci_reset(hci_t *controller);
|
||||
static void uhci_shutdown(hci_t *controller);
|
||||
static int uhci_bulk(endpoint_t *ep, int size, u8 *data, int finalize);
|
||||
static int uhci_control(usbdev_t *dev, direction_t dir, int drlen, void *devreq,
|
||||
int dalen, u8 *data);
|
||||
static void* uhci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming);
|
||||
static void uhci_destroy_intr_queue (endpoint_t *ep, void *queue);
|
||||
static u8* uhci_poll_intr_queue (void *queue);
|
||||
static void* uhci_create_intr_queue(endpoint_t *ep, int reqsize, int reqcount, int reqtiming);
|
||||
static void uhci_destroy_intr_queue(endpoint_t *ep, void *queue);
|
||||
static u8* uhci_poll_intr_queue(void *queue);
|
||||
|
||||
#if 0
|
||||
/* dump uhci */
|
||||
static void
|
||||
uhci_dump (hci_t *controller)
|
||||
uhci_dump(hci_t *controller)
|
||||
{
|
||||
usb_debug ("dump:\nUSBCMD: %x\n", uhci_reg_read16 (controller, USBCMD));
|
||||
usb_debug ("USBSTS: %x\n", uhci_reg_read16 (controller, USBSTS));
|
||||
usb_debug ("USBINTR: %x\n", uhci_reg_read16 (controller, USBINTR));
|
||||
usb_debug ("FRNUM: %x\n", uhci_reg_read16 (controller, FRNUM));
|
||||
usb_debug ("FLBASEADD: %x\n", uhci_reg_read32 (controller, FLBASEADD));
|
||||
usb_debug ("SOFMOD: %x\n", uhci_reg_read8 (controller, SOFMOD));
|
||||
usb_debug ("PORTSC1: %x\n", uhci_reg_read16 (controller, PORTSC1));
|
||||
usb_debug ("PORTSC2: %x\n", uhci_reg_read16 (controller, PORTSC2));
|
||||
usb_debug("dump:\nUSBCMD: %x\n", uhci_reg_read16(controller, USBCMD));
|
||||
usb_debug("USBSTS: %x\n", uhci_reg_read16(controller, USBSTS));
|
||||
usb_debug("USBINTR: %x\n", uhci_reg_read16(controller, USBINTR));
|
||||
usb_debug("FRNUM: %x\n", uhci_reg_read16(controller, FRNUM));
|
||||
usb_debug("FLBASEADD: %x\n", uhci_reg_read32(controller, FLBASEADD));
|
||||
usb_debug("SOFMOD: %x\n", uhci_reg_read8(controller, SOFMOD));
|
||||
usb_debug("PORTSC1: %x\n", uhci_reg_read16(controller, PORTSC1));
|
||||
usb_debug("PORTSC2: %x\n", uhci_reg_read16(controller, PORTSC2));
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -109,52 +109,52 @@ static void td_dump(td_t *td)
|
||||
}
|
||||
|
||||
static void
|
||||
uhci_reset (hci_t *controller)
|
||||
uhci_reset(hci_t *controller)
|
||||
{
|
||||
/* reset */
|
||||
uhci_reg_write16 (controller, USBCMD, 4); /* Global Reset */
|
||||
mdelay (50); /* uhci spec 2.1.1: at least 10ms */
|
||||
uhci_reg_write16 (controller, USBCMD, 0);
|
||||
mdelay (10);
|
||||
uhci_reg_write16 (controller, USBCMD, 2); /* Host Controller Reset */
|
||||
uhci_reg_write16(controller, USBCMD, 4); /* Global Reset */
|
||||
mdelay(50); /* uhci spec 2.1.1: at least 10ms */
|
||||
uhci_reg_write16(controller, USBCMD, 0);
|
||||
mdelay(10);
|
||||
uhci_reg_write16(controller, USBCMD, 2); /* Host Controller Reset */
|
||||
/* wait for controller to finish reset */
|
||||
/* TOTEST: how long to wait? 100ms for now */
|
||||
int timeout = 200; /* time out after 200 * 500us == 100ms */
|
||||
while (((uhci_reg_read16 (controller, USBCMD) & 2) != 0) && timeout--)
|
||||
udelay (500);
|
||||
while (((uhci_reg_read16(controller, USBCMD) & 2) != 0) && timeout--)
|
||||
udelay(500);
|
||||
if (timeout < 0)
|
||||
usb_debug ("Warning: uhci: host controller reset timed out.\n");
|
||||
usb_debug("Warning: uhci: host controller reset timed out.\n");
|
||||
}
|
||||
|
||||
static void
|
||||
uhci_reinit (hci_t *controller)
|
||||
uhci_reinit(hci_t *controller)
|
||||
{
|
||||
uhci_reg_write32 (controller, FLBASEADD,
|
||||
(u32) virt_to_phys (UHCI_INST (controller)->
|
||||
uhci_reg_write32(controller, FLBASEADD,
|
||||
(u32) virt_to_phys(UHCI_INST(controller)->
|
||||
framelistptr));
|
||||
//usb_debug ("framelist at %p\n",UHCI_INST(controller)->framelistptr);
|
||||
|
||||
/* disable irqs */
|
||||
uhci_reg_write16 (controller, USBINTR, 0);
|
||||
uhci_reg_write16(controller, USBINTR, 0);
|
||||
|
||||
/* reset framelist index */
|
||||
uhci_reg_write16 (controller, FRNUM, 0);
|
||||
uhci_reg_write16(controller, FRNUM, 0);
|
||||
|
||||
uhci_reg_write16(controller, USBCMD,
|
||||
uhci_reg_read16(controller, USBCMD) | 0xc0); // max packets, configure flag
|
||||
|
||||
uhci_start (controller);
|
||||
uhci_start(controller);
|
||||
}
|
||||
|
||||
hci_t *
|
||||
uhci_pci_init (pcidev_t addr)
|
||||
uhci_pci_init(pcidev_t addr)
|
||||
{
|
||||
int i;
|
||||
u16 reg16;
|
||||
|
||||
hci_t *controller = new_controller ();
|
||||
hci_t *controller = new_controller();
|
||||
controller->pcidev = addr;
|
||||
controller->instance = xzalloc(sizeof (uhci_t));
|
||||
controller->instance = xzalloc(sizeof(uhci_t));
|
||||
controller->type = UHCI;
|
||||
controller->start = uhci_start;
|
||||
controller->stop = uhci_stop;
|
||||
@@ -169,27 +169,27 @@ uhci_pci_init (pcidev_t addr)
|
||||
controller->create_intr_queue = uhci_create_intr_queue;
|
||||
controller->destroy_intr_queue = uhci_destroy_intr_queue;
|
||||
controller->poll_intr_queue = uhci_poll_intr_queue;
|
||||
init_device_entry (controller, 0);
|
||||
UHCI_INST (controller)->roothub = controller->devices[0];
|
||||
init_device_entry(controller, 0);
|
||||
UHCI_INST(controller)->roothub = controller->devices[0];
|
||||
|
||||
/* ~1 clears the register type indicator that is set to 1
|
||||
* for IO space */
|
||||
controller->reg_base = pci_read_config32 (addr, 0x20) & ~1;
|
||||
controller->reg_base = pci_read_config32(addr, 0x20) & ~1;
|
||||
|
||||
/* kill legacy support handler */
|
||||
uhci_stop (controller);
|
||||
mdelay (1);
|
||||
uhci_reg_write16 (controller, USBSTS, 0x3f);
|
||||
uhci_stop(controller);
|
||||
mdelay(1);
|
||||
uhci_reg_write16(controller, USBSTS, 0x3f);
|
||||
reg16 = pci_read_config16(addr, 0xc0);
|
||||
reg16 &= 0xdf80;
|
||||
pci_write_config16 (addr, 0xc0, reg16);
|
||||
pci_write_config16(addr, 0xc0, reg16);
|
||||
|
||||
UHCI_INST (controller)->framelistptr = memalign (0x1000, 1024 * sizeof (flistp_t)); /* 4kb aligned to 4kb */
|
||||
if (! UHCI_INST (controller)->framelistptr)
|
||||
UHCI_INST(controller)->framelistptr = memalign(0x1000, 1024 * sizeof(flistp_t)); /* 4kb aligned to 4kb */
|
||||
if (!UHCI_INST (controller)->framelistptr)
|
||||
fatal("Not enough memory for USB frame list pointer.\n");
|
||||
|
||||
memset (UHCI_INST (controller)->framelistptr, 0,
|
||||
1024 * sizeof (flistp_t));
|
||||
memset(UHCI_INST(controller)->framelistptr, 0,
|
||||
1024 * sizeof(flistp_t));
|
||||
|
||||
/* According to the *BSD UHCI code, this one is needed on some
|
||||
PIIX chips, because otherwise they misbehave. It must be
|
||||
@@ -203,70 +203,70 @@ uhci_pci_init (pcidev_t addr)
|
||||
fatal("Not enough memory for chipset workaround.\n");
|
||||
memset(antiberserk, 0, sizeof(td_t));
|
||||
|
||||
UHCI_INST (controller)->qh_prei = memalign (16, sizeof (qh_t));
|
||||
UHCI_INST (controller)->qh_intr = memalign (16, sizeof (qh_t));
|
||||
UHCI_INST (controller)->qh_data = memalign (16, sizeof (qh_t));
|
||||
UHCI_INST (controller)->qh_last = memalign (16, sizeof (qh_t));
|
||||
UHCI_INST(controller)->qh_prei = memalign(16, sizeof(qh_t));
|
||||
UHCI_INST(controller)->qh_intr = memalign(16, sizeof(qh_t));
|
||||
UHCI_INST(controller)->qh_data = memalign(16, sizeof(qh_t));
|
||||
UHCI_INST(controller)->qh_last = memalign(16, sizeof(qh_t));
|
||||
|
||||
if (! UHCI_INST (controller)->qh_prei ||
|
||||
! UHCI_INST (controller)->qh_intr ||
|
||||
! UHCI_INST (controller)->qh_data ||
|
||||
! UHCI_INST (controller)->qh_last)
|
||||
if (!UHCI_INST (controller)->qh_prei ||
|
||||
!UHCI_INST (controller)->qh_intr ||
|
||||
!UHCI_INST (controller)->qh_data ||
|
||||
!UHCI_INST (controller)->qh_last)
|
||||
fatal("Not enough memory for USB controller queues.\n");
|
||||
|
||||
UHCI_INST (controller)->qh_prei->headlinkptr =
|
||||
virt_to_phys (UHCI_INST (controller)->qh_intr) | FLISTP_QH;
|
||||
UHCI_INST (controller)->qh_prei->elementlinkptr = 0 | FLISTP_TERMINATE;
|
||||
UHCI_INST(controller)->qh_prei->headlinkptr =
|
||||
virt_to_phys(UHCI_INST(controller)->qh_intr) | FLISTP_QH;
|
||||
UHCI_INST(controller)->qh_prei->elementlinkptr = 0 | FLISTP_TERMINATE;
|
||||
|
||||
UHCI_INST (controller)->qh_intr->headlinkptr =
|
||||
virt_to_phys (UHCI_INST (controller)->qh_data) | FLISTP_QH;
|
||||
UHCI_INST (controller)->qh_intr->elementlinkptr = 0 | FLISTP_TERMINATE;
|
||||
UHCI_INST(controller)->qh_intr->headlinkptr =
|
||||
virt_to_phys(UHCI_INST(controller)->qh_data) | FLISTP_QH;
|
||||
UHCI_INST(controller)->qh_intr->elementlinkptr = 0 | FLISTP_TERMINATE;
|
||||
|
||||
UHCI_INST (controller)->qh_data->headlinkptr =
|
||||
virt_to_phys (UHCI_INST (controller)->qh_last) | FLISTP_QH;
|
||||
UHCI_INST (controller)->qh_data->elementlinkptr = 0 | FLISTP_TERMINATE;
|
||||
UHCI_INST(controller)->qh_data->headlinkptr =
|
||||
virt_to_phys(UHCI_INST(controller)->qh_last) | FLISTP_QH;
|
||||
UHCI_INST(controller)->qh_data->elementlinkptr = 0 | FLISTP_TERMINATE;
|
||||
|
||||
UHCI_INST (controller)->qh_last->headlinkptr = virt_to_phys (UHCI_INST (controller)->qh_data) | FLISTP_TERMINATE;
|
||||
UHCI_INST (controller)->qh_last->elementlinkptr = virt_to_phys (antiberserk) | FLISTP_TERMINATE;
|
||||
UHCI_INST(controller)->qh_last->headlinkptr = virt_to_phys(UHCI_INST(controller)->qh_data) | FLISTP_TERMINATE;
|
||||
UHCI_INST(controller)->qh_last->elementlinkptr = virt_to_phys(antiberserk) | FLISTP_TERMINATE;
|
||||
|
||||
for (i = 0; i < 1024; i++) {
|
||||
UHCI_INST (controller)->framelistptr[i] =
|
||||
virt_to_phys (UHCI_INST (controller)->qh_prei) | FLISTP_QH;
|
||||
UHCI_INST(controller)->framelistptr[i] =
|
||||
virt_to_phys(UHCI_INST(controller)->qh_prei) | FLISTP_QH;
|
||||
}
|
||||
controller->devices[0]->controller = controller;
|
||||
controller->devices[0]->init = uhci_rh_init;
|
||||
controller->devices[0]->init (controller->devices[0]);
|
||||
uhci_reset (controller);
|
||||
uhci_reinit (controller);
|
||||
controller->devices[0]->init(controller->devices[0]);
|
||||
uhci_reset(controller);
|
||||
uhci_reinit(controller);
|
||||
return controller;
|
||||
}
|
||||
|
||||
static void
|
||||
uhci_shutdown (hci_t *controller)
|
||||
uhci_shutdown(hci_t *controller)
|
||||
{
|
||||
if (controller == 0)
|
||||
return;
|
||||
detach_controller (controller);
|
||||
detach_controller(controller);
|
||||
uhci_reg_write16(controller, USBCMD,
|
||||
uhci_reg_read16(controller, USBCMD) & 0); // stop work
|
||||
free (UHCI_INST (controller)->framelistptr);
|
||||
free (UHCI_INST (controller)->qh_prei);
|
||||
free (UHCI_INST (controller)->qh_intr);
|
||||
free (UHCI_INST (controller)->qh_data);
|
||||
free (UHCI_INST (controller)->qh_last);
|
||||
free (UHCI_INST (controller));
|
||||
free (controller);
|
||||
free(UHCI_INST(controller)->framelistptr);
|
||||
free(UHCI_INST(controller)->qh_prei);
|
||||
free(UHCI_INST(controller)->qh_intr);
|
||||
free(UHCI_INST(controller)->qh_data);
|
||||
free(UHCI_INST(controller)->qh_last);
|
||||
free(UHCI_INST(controller));
|
||||
free(controller);
|
||||
}
|
||||
|
||||
static void
|
||||
uhci_start (hci_t *controller)
|
||||
uhci_start(hci_t *controller)
|
||||
{
|
||||
uhci_reg_write16(controller, USBCMD,
|
||||
uhci_reg_read16(controller, USBCMD) | 1); // start work on schedule
|
||||
}
|
||||
|
||||
static void
|
||||
uhci_stop (hci_t *controller)
|
||||
uhci_stop(hci_t *controller)
|
||||
{
|
||||
uhci_reg_write16(controller, USBCMD,
|
||||
uhci_reg_read16(controller, USBCMD) & ~1); // stop work on schedule
|
||||
@@ -277,31 +277,31 @@ uhci_stop (hci_t *controller)
|
||||
#define GET_TD(x) ((void*)(((unsigned int)(x))&~0xf))
|
||||
|
||||
static td_t *
|
||||
wait_for_completed_qh (hci_t *controller, qh_t *qh)
|
||||
wait_for_completed_qh(hci_t *controller, qh_t *qh)
|
||||
{
|
||||
int timeout = UHCI_TIMEOUT;
|
||||
void *current = GET_TD (qh->elementlinkptr);
|
||||
void *current = GET_TD(qh->elementlinkptr);
|
||||
while (((qh->elementlinkptr & FLISTP_TERMINATE) == 0) && (timeout-- > 0)) {
|
||||
if (current != GET_TD (qh->elementlinkptr)) {
|
||||
current = GET_TD (qh->elementlinkptr);
|
||||
if (current != GET_TD(qh->elementlinkptr)) {
|
||||
current = GET_TD(qh->elementlinkptr);
|
||||
timeout = UHCI_TIMEOUT;
|
||||
}
|
||||
uhci_reg_write16(controller, USBSTS,
|
||||
uhci_reg_read16(controller, USBSTS) | 0); // clear resettable registers
|
||||
udelay(UHCI_SLEEP_TIME_US);
|
||||
}
|
||||
return (GET_TD (qh->elementlinkptr) ==
|
||||
0) ? 0 : GET_TD (phys_to_virt (qh->elementlinkptr));
|
||||
return (GET_TD(qh->elementlinkptr) ==
|
||||
0) ? 0 : GET_TD(phys_to_virt(qh->elementlinkptr));
|
||||
}
|
||||
|
||||
static int
|
||||
maxlen (int size)
|
||||
maxlen(int size)
|
||||
{
|
||||
return (size - 1) & 0x7ff;
|
||||
}
|
||||
|
||||
static int
|
||||
min (int a, int b)
|
||||
min(int a, int b)
|
||||
{
|
||||
if (a < b)
|
||||
return a;
|
||||
@@ -310,7 +310,7 @@ min (int a, int b)
|
||||
}
|
||||
|
||||
static int
|
||||
uhci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen,
|
||||
uhci_control(usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen,
|
||||
unsigned char *data)
|
||||
{
|
||||
int endp = 0; /* this is control: always 0 */
|
||||
@@ -318,13 +318,13 @@ uhci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen
|
||||
int count = (2 + (dalen + mlen - 1) / mlen);
|
||||
unsigned short req = ((unsigned short *) devreq)[0];
|
||||
int i;
|
||||
td_t *tds = memalign (16, sizeof (td_t) * count);
|
||||
td_t *tds = memalign(16, sizeof(td_t) * count);
|
||||
if (!tds)
|
||||
fatal("Not enough memory for uhci control.\n");
|
||||
memset (tds, 0, sizeof (td_t) * count);
|
||||
memset(tds, 0, sizeof(td_t) * count);
|
||||
count--; /* to compensate for 0-indexed array */
|
||||
for (i = 0; i < count; i++) {
|
||||
tds[i].ptr = virt_to_phys (&tds[i + 1]) | TD_DEPTH_FIRST;
|
||||
tds[i].ptr = virt_to_phys(&tds[i + 1]) | TD_DEPTH_FIRST;
|
||||
}
|
||||
tds[count].ptr = 0 | TD_DEPTH_FIRST | TD_TERMINATE;
|
||||
|
||||
@@ -333,7 +333,7 @@ uhci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen
|
||||
endp << TD_EP_SHIFT |
|
||||
TD_TOGGLE_DATA0 |
|
||||
maxlen(drlen) << TD_MAXLEN_SHIFT;
|
||||
tds[0].bufptr = virt_to_phys (devreq);
|
||||
tds[0].bufptr = virt_to_phys(devreq);
|
||||
tds[0].ctrlsts = (3 << TD_COUNTER_SHIFT) |
|
||||
(dev->speed?TD_LOWSPEED:0) |
|
||||
TD_STATUS_ACTIVE;
|
||||
@@ -347,9 +347,9 @@ uhci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen
|
||||
}
|
||||
tds[i].token |= dev->address << TD_DEVADDR_SHIFT |
|
||||
endp << TD_EP_SHIFT |
|
||||
maxlen (min (mlen, dalen)) << TD_MAXLEN_SHIFT |
|
||||
maxlen(min(mlen, dalen)) << TD_MAXLEN_SHIFT |
|
||||
toggle << TD_TOGGLE_SHIFT;
|
||||
tds[i].bufptr = virt_to_phys (data);
|
||||
tds[i].bufptr = virt_to_phys(data);
|
||||
tds[i].ctrlsts = (3 << TD_COUNTER_SHIFT) |
|
||||
(dev->speed?TD_LOWSPEED:0) |
|
||||
TD_STATUS_ACTIVE;
|
||||
@@ -367,42 +367,42 @@ uhci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq, int dalen
|
||||
tds[count].ctrlsts = (0 << TD_COUNTER_SHIFT) | /* as Linux 2.4.10 does */
|
||||
(dev->speed?TD_LOWSPEED:0) |
|
||||
TD_STATUS_ACTIVE;
|
||||
UHCI_INST (dev->controller)->qh_data->elementlinkptr =
|
||||
virt_to_phys (tds) & ~(FLISTP_QH | FLISTP_TERMINATE);
|
||||
td_t *td = wait_for_completed_qh (dev->controller,
|
||||
UHCI_INST (dev->controller)->
|
||||
UHCI_INST(dev->controller)->qh_data->elementlinkptr =
|
||||
virt_to_phys(tds) & ~(FLISTP_QH | FLISTP_TERMINATE);
|
||||
td_t *td = wait_for_completed_qh(dev->controller,
|
||||
UHCI_INST(dev->controller)->
|
||||
qh_data);
|
||||
int result;
|
||||
if (td == 0) {
|
||||
result = 0;
|
||||
} else {
|
||||
usb_debug ("control packet, req %x\n", req);
|
||||
td_dump (td);
|
||||
usb_debug("control packet, req %x\n", req);
|
||||
td_dump(td);
|
||||
result = -1;
|
||||
}
|
||||
free (tds);
|
||||
free(tds);
|
||||
return result;
|
||||
}
|
||||
|
||||
static td_t *
|
||||
create_schedule (int numpackets)
|
||||
create_schedule(int numpackets)
|
||||
{
|
||||
if (numpackets == 0)
|
||||
return 0;
|
||||
td_t *tds = memalign (16, sizeof (td_t) * numpackets);
|
||||
td_t *tds = memalign(16, sizeof(td_t) * numpackets);
|
||||
if (!tds)
|
||||
fatal("Not enough memory for packets scheduling.\n");
|
||||
memset (tds, 0, sizeof (td_t) * numpackets);
|
||||
memset(tds, 0, sizeof(td_t) * numpackets);
|
||||
int i;
|
||||
for (i = 0; i < numpackets; i++) {
|
||||
tds[i].ptr = virt_to_phys (&tds[i + 1]) | TD_DEPTH_FIRST;
|
||||
tds[i].ptr = virt_to_phys(&tds[i + 1]) | TD_DEPTH_FIRST;
|
||||
}
|
||||
tds[numpackets - 1].ptr = 0 | TD_TERMINATE;
|
||||
return tds;
|
||||
}
|
||||
|
||||
static void
|
||||
fill_schedule (td_t *td, endpoint_t *ep, int length, unsigned char *data,
|
||||
fill_schedule(td_t *td, endpoint_t *ep, int length, unsigned char *data,
|
||||
int *toggle)
|
||||
{
|
||||
switch (ep->direction) {
|
||||
@@ -412,9 +412,9 @@ fill_schedule (td_t *td, endpoint_t *ep, int length, unsigned char *data,
|
||||
}
|
||||
td->token |= ep->dev->address << TD_DEVADDR_SHIFT |
|
||||
(ep->endpoint & 0xf) << TD_EP_SHIFT |
|
||||
maxlen (length) << TD_MAXLEN_SHIFT |
|
||||
maxlen(length) << TD_MAXLEN_SHIFT |
|
||||
(*toggle & 1) << TD_TOGGLE_SHIFT;
|
||||
td->bufptr = virt_to_phys (data);
|
||||
td->bufptr = virt_to_phys(data);
|
||||
td->ctrlsts = ((ep->direction == SETUP?3:0) << TD_COUNTER_SHIFT) |
|
||||
(ep->dev->speed?TD_LOWSPEED:0) |
|
||||
TD_STATUS_ACTIVE;
|
||||
@@ -422,23 +422,23 @@ fill_schedule (td_t *td, endpoint_t *ep, int length, unsigned char *data,
|
||||
}
|
||||
|
||||
static int
|
||||
run_schedule (usbdev_t *dev, td_t *td)
|
||||
run_schedule(usbdev_t *dev, td_t *td)
|
||||
{
|
||||
UHCI_INST (dev->controller)->qh_data->elementlinkptr =
|
||||
virt_to_phys (td) & ~(FLISTP_QH | FLISTP_TERMINATE);
|
||||
td = wait_for_completed_qh (dev->controller,
|
||||
UHCI_INST (dev->controller)->qh_data);
|
||||
UHCI_INST(dev->controller)->qh_data->elementlinkptr =
|
||||
virt_to_phys(td) & ~(FLISTP_QH | FLISTP_TERMINATE);
|
||||
td = wait_for_completed_qh(dev->controller,
|
||||
UHCI_INST(dev->controller)->qh_data);
|
||||
if (td == 0) {
|
||||
return 0;
|
||||
} else {
|
||||
td_dump (td);
|
||||
td_dump(td);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
/* finalize == 1: if data is of packet aligned size, add a zero length packet */
|
||||
static int
|
||||
uhci_bulk (endpoint_t *ep, int size, u8 *data, int finalize)
|
||||
uhci_bulk(endpoint_t *ep, int size, u8 *data, int finalize)
|
||||
{
|
||||
int maxpsize = ep->maxpacketsize;
|
||||
if (maxpsize == 0)
|
||||
@@ -449,21 +449,21 @@ uhci_bulk (endpoint_t *ep, int size, u8 *data, int finalize)
|
||||
}
|
||||
if (numpackets == 0)
|
||||
return 0;
|
||||
td_t *tds = create_schedule (numpackets);
|
||||
td_t *tds = create_schedule(numpackets);
|
||||
int i = 0, toggle = ep->toggle;
|
||||
while ((size > 0) || ((size == 0) && (finalize != 0))) {
|
||||
fill_schedule (&tds[i], ep, min (size, maxpsize), data,
|
||||
fill_schedule(&tds[i], ep, min(size, maxpsize), data,
|
||||
&toggle);
|
||||
i++;
|
||||
data += maxpsize;
|
||||
size -= maxpsize;
|
||||
}
|
||||
if (run_schedule (ep->dev, tds) == 1) {
|
||||
free (tds);
|
||||
if (run_schedule(ep->dev, tds) == 1) {
|
||||
free(tds);
|
||||
return -1;
|
||||
}
|
||||
ep->toggle = toggle;
|
||||
free (tds);
|
||||
free(tds);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -479,7 +479,7 @@ typedef struct {
|
||||
|
||||
/* create and hook-up an intr queue into device schedule */
|
||||
static void*
|
||||
uhci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming)
|
||||
uhci_create_intr_queue(endpoint_t *ep, int reqsize, int reqcount, int reqtiming)
|
||||
{
|
||||
u8 *data = malloc(reqsize*reqcount);
|
||||
td_t *tds = memalign(16, sizeof(td_t) * reqcount);
|
||||
@@ -501,10 +501,10 @@ uhci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming
|
||||
q->reqsize = reqsize;
|
||||
q->last_td = &tds[reqcount - 1];
|
||||
|
||||
memset (tds, 0, sizeof (td_t) * reqcount);
|
||||
memset(tds, 0, sizeof(td_t) * reqcount);
|
||||
int i;
|
||||
for (i = 0; i < reqcount; i++) {
|
||||
tds[i].ptr = virt_to_phys (&tds[i + 1]);
|
||||
tds[i].ptr = virt_to_phys(&tds[i + 1]);
|
||||
|
||||
switch (ep->direction) {
|
||||
case IN: tds[i].token = UHCI_IN; break;
|
||||
@@ -513,9 +513,9 @@ uhci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming
|
||||
}
|
||||
tds[i].token |= ep->dev->address << TD_DEVADDR_SHIFT |
|
||||
(ep->endpoint & 0xf) << TD_EP_SHIFT |
|
||||
maxlen (reqsize) << TD_MAXLEN_SHIFT |
|
||||
maxlen(reqsize) << TD_MAXLEN_SHIFT |
|
||||
(ep->toggle & 1) << TD_TOGGLE_SHIFT;
|
||||
tds[i].bufptr = virt_to_phys (data);
|
||||
tds[i].bufptr = virt_to_phys(data);
|
||||
tds[i].ctrlsts = (0 << TD_COUNTER_SHIFT) |
|
||||
(ep->dev->speed?TD_LOWSPEED:0) |
|
||||
TD_STATUS_ACTIVE;
|
||||
@@ -549,7 +549,7 @@ uhci_create_intr_queue (endpoint_t *ep, int reqsize, int reqcount, int reqtiming
|
||||
|
||||
/* remove queue from device schedule, dropping all data that came in */
|
||||
static void
|
||||
uhci_destroy_intr_queue (endpoint_t *ep, void *q_)
|
||||
uhci_destroy_intr_queue(endpoint_t *ep, void *q_)
|
||||
{
|
||||
intr_q *const q = (intr_q*)q_;
|
||||
|
||||
@@ -574,7 +574,7 @@ uhci_destroy_intr_queue (endpoint_t *ep, void *q_)
|
||||
Recommended use: while (data=poll_intr_queue(q)) process(data);
|
||||
*/
|
||||
static u8*
|
||||
uhci_poll_intr_queue (void *q_)
|
||||
uhci_poll_intr_queue(void *q_)
|
||||
{
|
||||
intr_q *q = (intr_q*)q_;
|
||||
if ((q->tds[q->lastread].ctrlsts & TD_STATUS_ACTIVE) == 0) {
|
||||
@@ -605,37 +605,37 @@ uhci_poll_intr_queue (void *q_)
|
||||
}
|
||||
|
||||
void
|
||||
uhci_reg_write32 (hci_t *ctrl, usbreg reg, u32 value)
|
||||
uhci_reg_write32(hci_t *ctrl, usbreg reg, u32 value)
|
||||
{
|
||||
outl (value, ctrl->reg_base + reg);
|
||||
outl(value, ctrl->reg_base + reg);
|
||||
}
|
||||
|
||||
u32
|
||||
uhci_reg_read32 (hci_t *ctrl, usbreg reg)
|
||||
uhci_reg_read32(hci_t *ctrl, usbreg reg)
|
||||
{
|
||||
return inl (ctrl->reg_base + reg);
|
||||
return inl(ctrl->reg_base + reg);
|
||||
}
|
||||
|
||||
void
|
||||
uhci_reg_write16 (hci_t *ctrl, usbreg reg, u16 value)
|
||||
uhci_reg_write16(hci_t *ctrl, usbreg reg, u16 value)
|
||||
{
|
||||
outw (value, ctrl->reg_base + reg);
|
||||
outw(value, ctrl->reg_base + reg);
|
||||
}
|
||||
|
||||
u16
|
||||
uhci_reg_read16 (hci_t *ctrl, usbreg reg)
|
||||
uhci_reg_read16(hci_t *ctrl, usbreg reg)
|
||||
{
|
||||
return inw (ctrl->reg_base + reg);
|
||||
return inw(ctrl->reg_base + reg);
|
||||
}
|
||||
|
||||
void
|
||||
uhci_reg_write8 (hci_t *ctrl, usbreg reg, u8 value)
|
||||
uhci_reg_write8(hci_t *ctrl, usbreg reg, u8 value)
|
||||
{
|
||||
outb (value, ctrl->reg_base + reg);
|
||||
outb(value, ctrl->reg_base + reg);
|
||||
}
|
||||
|
||||
u8
|
||||
uhci_reg_read8 (hci_t *ctrl, usbreg reg)
|
||||
uhci_reg_read8(hci_t *ctrl, usbreg reg)
|
||||
{
|
||||
return inb (ctrl->reg_base + reg);
|
||||
return inb(ctrl->reg_base + reg);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user