drop "arch/asm.h" and "arch/intel.h" and create "cpu/x86/post_code.h"

(which could at some time hold global post code definitions, too)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5498 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/x86/lapic/secondary.S

@@ -1,7 +1,6 @@
-#include <arch/asm.h>
-#include <arch/intel.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/lapic_def.h>
+
 	.text
 	.globl _secondary_start, _secondary_start_end
 	.balign 4096

src/cpu/x86/smm/smmhandler.S

@@ -52,8 +52,6 @@
  *
  */
 
-#include <arch/asm.h>
-
 #define LAPIC_ID 0xfee00020
 
 /* SMM_HANDLER_OFFSET is the 16bit offset within the ASEG

src/cpu/x86/smm/smmrelocate.S

@@ -19,13 +19,13 @@
  * MA 02110-1301 USA
  */
 
-#include <arch/asm.h>
-
 // Make sure no stage 2 code is included:
 #define __PRE_RAM__
 
 // FIXME: Is this piece of code southbridge specific, or 
 // can it be cleaned up so this include is not required?
+// It's needed right now because we get our PM_BASE from
+// here.
 #include "../../../southbridge/intel/i82801gx/i82801gx.h"
 
 #undef DEBUG_SMM_RELOCATION