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AGESA f14/f15tn/f16kb: Factor out PCI MMIO base/size

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We set BLDCFG_PCI_MMIO_BASE and BLDCFG_PCI_MMIO_SIZE to the same values
everywhere, so we might as well factor them out. As we have equivalent
Kconfig options in coreboot, also deprecate overriding them via BLDCFG.

TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb
mainboards result in identical coreboot binaries.

Change-Id: I7244c39d2c2aa02a3a9092ddae98e4ac9da89107
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41595
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
This commit is contained in:
Angel Pons
2020-05-21 01:06:28 +02:00
committed by Nico Huber
parent 41b820cbd6
commit 5f82370d7b
28 changed files with 27 additions and 91 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/mainboard/amd/inagua/buildOpts.c
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@ -54,9 +54,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
#define BLDCFG_VRM_CURRENT_LIMIT 24000
//#define BLDCFG_VRM_NB_CURRENT_LIMIT 0
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000

2
src/mainboard/amd/olivehill/buildOpts.c
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@ -66,8 +66,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 15000

2
src/mainboard/amd/parmer/buildOpts.c
View File

@ -63,8 +63,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 90000

3
src/mainboard/amd/persimmon/buildOpts.c
View File

@ -54,9 +54,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
#define BLDCFG_VRM_CURRENT_LIMIT 24000
//#define BLDCFG_VRM_NB_CURRENT_LIMIT 0
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000

3
src/mainboard/amd/south_station/buildOpts.c
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@ -54,9 +54,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
#define BLDCFG_VRM_CURRENT_LIMIT 24000
//#define BLDCFG_VRM_NB_CURRENT_LIMIT 0
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000

2
src/mainboard/amd/thatcher/buildOpts.c
View File

@ -63,8 +63,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 90000

3
src/mainboard/amd/union_station/buildOpts.c
View File

@ -54,9 +54,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
#define BLDCFG_VRM_CURRENT_LIMIT 24000
//#define BLDCFG_VRM_NB_CURRENT_LIMIT 0
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000

3
src/mainboard/asrock/e350m1/buildOpts.c
View File

@ -62,9 +62,6 @@
* needed by the system.
*/
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
#define BLDCFG_VRM_CURRENT_LIMIT 24000
//#define BLDCFG_VRM_NB_CURRENT_LIMIT 0
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000

2
src/mainboard/asrock/imb-a180/buildOpts.c
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@ -66,8 +66,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 15000

2
src/mainboard/asus/am1i-a/buildOpts.c
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@ -82,8 +82,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 15000

2
src/mainboard/asus/f2a85-m/buildOpts.c
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@ -76,8 +76,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 90000

2
src/mainboard/bap/ode_e20XX/buildOpts.c
View File

@ -66,8 +66,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 15000

2
src/mainboard/biostar/a68n_5200/buildOpts.c
View File

@ -66,8 +66,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 15000

2
src/mainboard/biostar/am1ml/buildOpts.c
View File

@ -66,8 +66,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 15000

3
src/mainboard/elmex/pcm205400/buildOpts.c
View File

@ -54,9 +54,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
#define BLDCFG_VRM_CURRENT_LIMIT 24000
//#define BLDCFG_VRM_NB_CURRENT_LIMIT 0
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000

3
src/mainboard/gizmosphere/gizmo/buildOpts.c
View File

@ -54,9 +54,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
#define BLDCFG_VRM_CURRENT_LIMIT 24000
//#define BLDCFG_VRM_NB_CURRENT_LIMIT 0
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000

2
src/mainboard/gizmosphere/gizmo2/buildOpts.c
View File

@ -66,8 +66,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 15000

2
src/mainboard/hp/abm/buildOpts.c
View File

@ -71,8 +71,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 15000

2
src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
View File

@ -77,8 +77,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 90000

3
src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
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@ -68,9 +68,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
#define BLDCFG_VRM_CURRENT_LIMIT 24000
//#define BLDCFG_VRM_NB_CURRENT_LIMIT 0
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000

2
src/mainboard/lenovo/g505s/buildOpts.c
View File

@ -77,8 +77,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 90000

3
src/mainboard/lippert/frontrunner-af/buildOpts.c
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@ -54,9 +54,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
#define BLDCFG_VRM_CURRENT_LIMIT 24000
//#define BLDCFG_VRM_NB_CURRENT_LIMIT 0
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000

3
src/mainboard/lippert/toucan-af/buildOpts.c
View File

@ -54,9 +54,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
#define BLDCFG_VRM_CURRENT_LIMIT 24000
//#define BLDCFG_VRM_NB_CURRENT_LIMIT 0
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000

2
src/mainboard/msi/ms7721/buildOpts.c
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@ -76,8 +76,6 @@
//#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
/* Build configuration values here.
*/
#define BLDCFG_VRM_CURRENT_LIMIT 90000

3
src/mainboard/pcengines/apu1/buildOpts.c
View File

@ -54,9 +54,6 @@
#define BLDOPT_REMOVE_GFX_RECOVERY TRUE
#define BLDOPT_REMOVE_EARLY_SAMPLES TRUE
#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS
#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER
#define BLDCFG_VRM_CURRENT_LIMIT 24000
//#define BLDCFG_VRM_NB_CURRENT_LIMIT 0
#define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000

19
src/vendorcode/amd/agesa/f14/Config/PlatformInstall.h
View File

@ -1081,17 +1081,9 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#define CFG_PCI_MMIO_BASE (CONFIG_MMCONF_BASE_ADDRESS)
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#define CFG_PCI_MMIO_SIZE (CONFIG_MMCONF_BUS_NUMBER)
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
@ -1102,6 +1094,13 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
/*---------------------------------------------------------------------------
* Processing the options: Third, perform the option cross checks
*--------------------------------------------------------------------------*/
// Check that deprecated options are not used
#ifdef BLDCFG_PCI_MMIO_BASE
#error BLDOPT: BLDCFG_PCI_MMIO_BASE has been deprecated in coreboot. Do not use!
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#error BLDOPT: BLDCFG_PCI_MMIO_SIZE has been deprecated in coreboot. Do not use!
#endif
// Assure that at least one type of memory support is included
#if OPTION_UDIMMS == FALSE
#if OPTION_RDIMMS == FALSE

19
src/vendorcode/amd/agesa/f15tn/Config/PlatformInstall.h
View File

@ -2418,17 +2418,9 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#define CFG_PLATFORM_POWER_POLICY_MODE (Performance)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#define CFG_PCI_MMIO_BASE (CONFIG_MMCONF_BASE_ADDRESS)
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#define CFG_PCI_MMIO_SIZE (CONFIG_MMCONF_BUS_NUMBER)
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
@ -2445,6 +2437,13 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
/*---------------------------------------------------------------------------
* Processing the options: Third, perform the option cross checks
*--------------------------------------------------------------------------*/
// Check that deprecated options are not used
#ifdef BLDCFG_PCI_MMIO_BASE
#error BLDOPT: BLDCFG_PCI_MMIO_BASE has been deprecated in coreboot. Do not use!
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#error BLDOPT: BLDCFG_PCI_MMIO_SIZE has been deprecated in coreboot. Do not use!
#endif
// Assure that at least one type of memory support is included
#if OPTION_UDIMMS == FALSE
#if OPTION_RDIMMS == FALSE

19
src/vendorcode/amd/agesa/f16kb/Config/PlatformInstall.h
View File

@ -1426,17 +1426,9 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
#define CFG_LHTC_TEMPERATURE_LIMIT (0)
#endif
#ifdef BLDCFG_PCI_MMIO_BASE
#define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE)
#else
#define CFG_PCI_MMIO_BASE (0)
#endif
#define CFG_PCI_MMIO_BASE (CONFIG_MMCONF_BASE_ADDRESS)
#ifdef BLDCFG_PCI_MMIO_SIZE
#define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE)
#else
#define CFG_PCI_MMIO_SIZE (0)
#endif
#define CFG_PCI_MMIO_SIZE (CONFIG_MMCONF_BUS_NUMBER)
#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST
#define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST)
@ -1501,6 +1493,13 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
/*---------------------------------------------------------------------------
* Processing the options: Third, perform the option cross checks
*--------------------------------------------------------------------------*/
// Check that deprecated options are not used
#ifdef BLDCFG_PCI_MMIO_BASE
#error BLDOPT: BLDCFG_PCI_MMIO_BASE has been deprecated in coreboot. Do not use!
#endif
#ifdef BLDCFG_PCI_MMIO_SIZE
#error BLDOPT: BLDCFG_PCI_MMIO_SIZE has been deprecated in coreboot. Do not use!
#endif
// Assure that at least one type of memory support is included
#if OPTION_UDIMMS == FALSE
#if OPTION_RDIMMS == FALSE