armv7: Clean up arm/snow bootblock build process.

Remove duplicated / testing code and share more driver for bootblock, romstage
and ramstage.

The __PRE_RAM__ is now also defined in bootblock build stage, since bootblock is
executed before RAM is initialized.

Change-Id: I4f5469b1545631eee1cf9f2f5df93cbe3a58268b
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: http://review.coreboot.org/2282
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Hung-Te Lin
2013-02-04 14:38:03 +08:00
committed by Ronald G. Minnich
parent c720d8d5d4
commit 5f83f6cb7a
18 changed files with 43 additions and 667 deletions

View File

@@ -1,28 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2013 Google Inc
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <arch/bootblock_exit.h>
void bootblock_exit(unsigned long addr)
{
__attribute__((noreturn)) void (*doit)(void) = (void *)addr;
doit();
}

View File

@@ -38,19 +38,19 @@ static int boot_cpu(void)
void main(void)
{
const char *target1 = "fallback/romstage";
unsigned long romstage_entry;
const char *stage_name = "fallback/romstage";
void *entry;
if (boot_cpu()) {
bootblock_cpu_init();
bootblock_mainboard_init();
}
printk(BIOS_INFO, "hello from bootblock\n");
printk(BIOS_INFO, "bootblock main(): loading romstage\n");
romstage_entry = (unsigned long)cbfs_load_stage(
CBFS_DEFAULT_MEDIA, target1);
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name);
printk(BIOS_INFO, "bootblock main(): jumping to romstage\n");
if (romstage_entry) stage_exit(romstage_entry);
if (entry) stage_exit(entry);
hlt();
}

View File

@@ -1,26 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2013 Google Inc
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
/**
* This is a shim that is to be compiled for the instruction set matching
* that of the entry point for the next boot stage (romstage).
*/
void bootblock_exit(unsigned long addr);

View File

@@ -23,6 +23,6 @@
extern void main(void);
void stage_entry(void) __attribute__((section(".text.stage_entry.armv7")));
void stage_exit(unsigned long);
void stage_exit(void *);
#endif

View File

@@ -1,4 +1,5 @@
bootblock-y += syslib.c
bootblock-y += romstage_console.c
romstage-y += cache_v7.c
romstage-y += cache-cp15.c
@@ -8,7 +9,6 @@ romstage-y += romstage_console.c
romstage-y += syslib.c
#ramstage-y += printk_init.c
#romstage-y += walkcbfs.S
ramstage-y += div0.c
ramstage-y += div64.S

View File

@@ -19,6 +19,7 @@
#include <console/console.h>
#include <console/vtxprintf.h>
// TODO Unify with x86 (CONFIG_CONSOLE_SERIAL8250)
#if CONFIG_SERIAL_CONSOLE
#include <uart.h>
#endif
@@ -43,18 +44,15 @@ void console_tx_byte(unsigned char byte)
#endif
}
/* FIXME(dhendrix): add this back in */
#if 0
static void console_tx_flush(void)
static void _console_tx_flush(void)
{
#if CONFIG_CONSOLE_SERIAL
uart_tx_flush(CONFIG_CONSOLE_SERIAL_UART_ADDRESS);
#if CONFIG_SERIAL_CONSOLE
uart_tx_flush();
#endif
#if CONFIG_USBDEBUG
usbdebug_tx_flush(0);
#endif
}
#endif
int do_printk(int msg_level, const char *fmt, ...)
{
@@ -69,7 +67,7 @@ int do_printk(int msg_level, const char *fmt, ...)
i = vtxprintf(console_tx_byte, fmt, args);
va_end(args);
// console_tx_flush();
_console_tx_flush();
return i;
}

View File

@@ -38,8 +38,8 @@ void stage_entry(void)
main();
}
void stage_exit(unsigned long addr)
void stage_exit(void *addr)
{
__attribute__((noreturn)) void (*doit)(void) = (void *)addr;
__attribute__((noreturn)) void (*doit)(void) = addr;
doit();
}