cpu/amd: Fix cbtypes.h to match UINTN convention
There are some inconsistencies in AMDs APIs between the coreboot code and the vendorcode code. Unify the API. UINTN maps to uintptr_t in UEFI land. Do the same here. Also switch the other UEFI types to map to fixed size types. Change-Id: Ib46893c7cd5368eae43e9cda30eed7398867ac5b Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-on: http://review.coreboot.org/10601 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
committed by
Stefan Reinauer
parent
d91ddc8d31
commit
5fa4cb6d32
@@ -226,7 +226,7 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON
|
||||
pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */
|
||||
//pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS;
|
||||
pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS;
|
||||
pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry;
|
||||
pConfig->StandardHeader.CalloutPtr = (CALLOUT_ENTRY)&rd890_callout_entry;
|
||||
|
||||
/*
|
||||
* PCI Address to Access NB. Depends on HT topology and configuration for multi NB platform.
|
||||
|
@@ -135,7 +135,7 @@ void sb700_cimx_config(AMDSBCFG *sb_config)
|
||||
#ifndef __PRE_RAM__
|
||||
/* ramstage cimx config here */
|
||||
if (!sb_config->StdHeader.pCallBack) {
|
||||
sb_config->StdHeader.pCallBack = sb700_callout_entry;
|
||||
sb_config->StdHeader.pCallBack = (CIM_HOOK_ENTRY)&sb700_callout_entry;
|
||||
}
|
||||
|
||||
//sb_config->
|
||||
|
@@ -226,7 +226,7 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON
|
||||
pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */
|
||||
//pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS;
|
||||
pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS;
|
||||
pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry;
|
||||
pConfig->StandardHeader.CalloutPtr = (CALLOUT_ENTRY)&rd890_callout_entry;
|
||||
|
||||
/*
|
||||
* PCI Address to Access NB. Depends on HT topology and configuration for multi NB platform.
|
||||
|
@@ -226,7 +226,7 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON
|
||||
pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */
|
||||
//pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS;
|
||||
pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS;
|
||||
pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry;
|
||||
pConfig->StandardHeader.CalloutPtr = (CALLOUT_ENTRY)&rd890_callout_entry;
|
||||
|
||||
/*
|
||||
* PCI Address to Access NB. Depends on HT topology and configuration for multi NB platform.
|
||||
|
@@ -226,7 +226,7 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON
|
||||
pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */
|
||||
//pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS;
|
||||
pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS;
|
||||
pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry;
|
||||
pConfig->StandardHeader.CalloutPtr = (CALLOUT_ENTRY)&rd890_callout_entry;
|
||||
|
||||
/*
|
||||
* PCI Address to Access NB. Depends on HT topology and configuration for multi NB platform.
|
||||
|
Reference in New Issue
Block a user