mb/emulation/*-riscv: Remove "UCB" from RISC-V board names
RISC-V is not a project of the University of California, Berkeley, anymore; it stands on its own feet now. Remove the "UCB" component from the RISC-V mainboards in the "emulation" directory, and don't set MAINBOARD_VENDOR to UCB, either. Change-Id: I301d9d0091a714e62375052e5af06a9197876688 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28951 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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committed by
Ronald G. Minnich
parent
6bedbd6116
commit
5fba1ea5bc
@@ -15,7 +15,7 @@
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# To execute, do:
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# To execute, do:
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# qemu-system-arm -M vexpress-a9 -m 1024M -nographic -kernel build/coreboot.rom
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# qemu-system-arm -M vexpress-a9 -m 1024M -nographic -kernel build/coreboot.rom
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if BOARD_EMULATION_QEMU_UCB_RISCV
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if BOARD_EMULATION_QEMU_RISCV
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config BOARD_SPECIFIC_OPTIONS # dummy
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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def_bool y
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@@ -36,12 +36,8 @@ config MAX_CPUS
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int
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int
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default 1
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default 1
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config MAINBOARD_VENDOR
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string
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default "UCB"
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config DRAM_SIZE_MB
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config DRAM_SIZE_MB
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int
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int
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default 32768
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default 32768
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endif # BOARD_EMULATION_QEMU_UCB_RISCV
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endif # BOARD_EMULATION_QEMU_RISCV
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@@ -1,2 +1,2 @@
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config BOARD_EMULATION_QEMU_UCB_RISCV
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config BOARD_EMULATION_QEMU_RISCV
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bool "QEMU ucb riscv"
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bool "QEMU riscv"
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@@ -12,7 +12,7 @@
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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## GNU General Public License for more details.
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if BOARD_EMULATION_SPIKE_UCB_RISCV
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if BOARD_EMULATION_SPIKE_RISCV
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config BOARD_SPECIFIC_OPTIONS # dummy
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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def_bool y
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@@ -33,8 +33,4 @@ config MAX_CPUS
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int
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int
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default 1
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default 1
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config MAINBOARD_VENDOR
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endif # BOARD_EMULATION_SPIKE_RISCV
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string
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default "UCB"
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endif # BOARD_EMULATION_SPIKE_UCB_RISCV
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@@ -1,5 +1,5 @@
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config BOARD_EMULATION_SPIKE_UCB_RISCV
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config BOARD_EMULATION_SPIKE_RISCV
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bool "SPIKE ucb riscv"
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bool "SPIKE riscv"
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help
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help
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To run coreboot in spike:
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To run coreboot in spike:
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* run "make" as usual
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* run "make" as usual
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