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Disable debug console

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Change-Id: Ieca895cb4c7be95600f955ed85fc06f877ba9216
This commit is contained in:
Jeremy Soller
2020-11-17 13:53:16 -07:00
parent 68ccba9a11
commit 604e699ace
2 changed files with 2 additions and 6 deletions
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4
src/mainboard/system76/lemp10/devicetree.cb
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@@ -155,7 +155,7 @@ chip soc/intel/tigerlake
register "SerialIoUartMode" = "{ register "SerialIoUartMode" = "{
[PchSerialIoIndexUART0] = PchSerialIoDisabled, [PchSerialIoIndexUART0] = PchSerialIoDisabled,
[PchSerialIoIndexUART1] = PchSerialIoDisabled, [PchSerialIoIndexUART1] = PchSerialIoDisabled,
[PchSerialIoIndexUART2] = PchSerialIoPci, // Debug console [PchSerialIoIndexUART2] = PchSerialIoDisabled,
}" }"
# USB2 # USB2
@@ -314,7 +314,7 @@ chip soc/intel/tigerlake
device pci 17.0 on end # SATA 0xA0D3 device pci 17.0 on end # SATA 0xA0D3
device pci 19.0 off end # I2C4 0xA0C5 device pci 19.0 off end # I2C4 0xA0C5
device pci 19.1 off end # I2C5 0xA0C6 device pci 19.1 off end # I2C5 0xA0C6
device pci 19.2 on end # UART2 0xA0C7 device pci 19.2 off end # UART2 0xA0C7
device pci 1c.0 off end # RP1 0xA0B8 device pci 1c.0 off end # RP1 0xA0B8
device pci 1c.1 off end # RP2 0xA0B9 device pci 1c.1 off end # RP2 0xA0B9
device pci 1c.2 on end # RP3 0xA0BA device pci 1c.2 on end # RP3 0xA0BA

4
src/mainboard/system76/lemp10/gpio.h
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@@ -10,10 +10,6 @@
/* Pad configuration in romstage. */ /* Pad configuration in romstage. */
static const struct pad_config early_gpio_table[] = { static const struct pad_config early_gpio_table[] = {
// UART2_RXD
PAD_NC(GPP_C20, NONE),
// UART2_TXD
PAD_CFG_NF(GPP_C21, UP_20K, DEEP, NF1),
}; };
/* Pad configuration in ramstage. */ /* Pad configuration in ramstage. */