soc/apollolake: Return correct wake status in _SWS

Wake status is calculated from the four pairs of gpe0 in
cbmem CBMEM_ID_POWER_STATE which is filled very early
in romstage and depends on the routing information in
PMC GPE_CFG register. Coreboot sets the proper value
of routing based on devicetree from pmc_init. But when
system goes to S3 on waking up PMC is writing default
values again in GPE_CFG which results in returning
wrong wake status in _SWS. This patch corrects that
behaviour by correcting the gpe0 pairs in cbmem after
PMC sets the routing table in resume path.

BUG=chrome-os-partner:54876
TEST=On resume through powerbtn, lidopen, keyboard press,  etc.
     we are getting proper wake status.

Change-Id: I5942d5c20d8c6aef73468dc611190bb7c49c7c7a
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/16040
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Brandon Breitenstein <brandon.breitenstein@intel.com>

src/soc/intel/apollolake/Kconfig

@@ -44,6 +44,7 @@ config CPU_SPECIFIC_OPTIONS
 	select SMM_TSEG
 	select SOC_INTEL_COMMON
 	select SOC_INTEL_COMMON_ACPI
+	select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
 	select SOC_INTEL_COMMON_LPSS_I2C
 	select SOC_INTEL_COMMON_SMI
 	select SPI_FLASH