mainboard/ibase/mb899: Indent devicetree.cb
Change-Id: I29037c322dac5ed9ebc36b95bc1981acf21e5bd0 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5778 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin.roth@se-eng.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
committed by
Idwer Vollering
parent
fb8df3240f
commit
61113de923
@@ -1,18 +1,17 @@
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chip northbridge/intel/i945
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chip northbridge/intel/i945
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device cpu_cluster 0 on
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chip cpu/intel/socket_mFCPGA478
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device lapic 0 on end
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end
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end
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device cpu_cluster 0 on
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device domain 0 on
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chip cpu/intel/socket_mFCPGA478
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device pci 00.0 on end # host bridge
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device lapic 0 on end
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end
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end
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device domain 0 on
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device pci 00.0 on end # host bridge
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device pci 01.0 off end # i945 PCIe root port
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device pci 01.0 off end # i945 PCIe root port
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device pci 02.0 on end # vga controller
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device pci 02.0 on end # vga controller
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device pci 02.1 on end # display controller
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device pci 02.1 on end # display controller
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chip southbridge/intel/i82801gx
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chip southbridge/intel/i82801gx
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register "pirqa_routing" = "0x05"
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register "pirqa_routing" = "0x05"
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register "pirqb_routing" = "0x07"
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register "pirqb_routing" = "0x07"
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register "pirqc_routing" = "0x05"
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register "pirqc_routing" = "0x05"
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@@ -28,44 +27,42 @@ chip northbridge/intel/i945
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# 2 SCI (if corresponding GPIO_EN bit is also set)
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# 2 SCI (if corresponding GPIO_EN bit is also set)
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register "gpi13_routing" = "1"
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register "gpi13_routing" = "1"
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register "ide_legacy_combined" = "0x0"
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register "ide_legacy_combined" = "0x0"
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register "ide_enable_primary" = "0x1"
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register "ide_enable_primary" = "0x1"
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register "ide_enable_secondary" = "0x0"
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register "ide_enable_secondary" = "0x0"
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register "sata_ahci" = "0x1"
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register "sata_ahci" = "0x1"
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#device pci 1b.0 on end # High Definition Audio
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#device pci 1b.0 on end # High Definition Audio
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device pci 1c.0 on end # PCIe
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device pci 1c.0 on end # PCIe
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device pci 1c.1 on end # PCIe
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device pci 1c.1 on end # PCIe
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device pci 1c.2 on end # PCIe
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device pci 1c.2 on end # PCIe
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#device pci 1c.3 off end # PCIe port 4
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#device pci 1c.3 off end # PCIe port 4
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#device pci 1c.4 off end # PCIe port 5
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#device pci 1c.4 off end # PCIe port 5
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#device pci 1c.5 off end # PCIe port 6
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#device pci 1c.5 off end # PCIe port 6
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device pci 1d.0 on end # USB UHCI
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device pci 1d.0 on end # USB UHCI
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device pci 1d.1 on end # USB UHCI
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device pci 1d.1 on end # USB UHCI
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device pci 1d.2 on end # USB UHCI
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device pci 1d.2 on end # USB UHCI
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device pci 1d.3 on end # USB UHCI
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device pci 1d.3 on end # USB UHCI
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device pci 1d.7 on end # USB2 EHCI
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device pci 1d.7 on end # USB2 EHCI
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device pci 1e.0 on end # PCI bridge
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device pci 1e.0 on end # PCI bridge
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#device pci 1e.2 off end # AC'97 Audio
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#device pci 1e.2 off end # AC'97 Audio
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#device pci 1e.3 off end # AC'97 Modem
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#device pci 1e.3 off end # AC'97 Modem
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device pci 1f.0 on # LPC bridge
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device pci 1f.0 on # LPC bridge
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chip superio/winbond/w83627ehg
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chip superio/winbond/w83627ehg
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device pnp 4e.0 off # Floppy
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device pnp 4e.0 off end # Floppy
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device pnp 4e.1 off end # Parport
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device pnp 4e.2 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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end
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device pnp 4e.1 off # Parport
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device pnp 4e.3 on # COM2
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end
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io 0x60 = 0x2f8
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device pnp 4e.2 on # COM1
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irq 0x70 = 3
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 4e.3 on # COM2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq
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irq 0xf1 = 4 # set IRMODE 0 # XXX not an irq
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end
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end
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device pnp 4e.5 on # PS/2 keyboard & mouse
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device pnp 4e.5 on # PS/2 keyboard & mouse
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io 0x60 = 0x60
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io 0x60 = 0x60
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io 0x62 = 0x64
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io 0x62 = 0x64
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irq 0x70 = 1
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irq 0x70 = 1
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irq 0x72 = 12
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irq 0x72 = 12
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irq 0xf0 = 0x82 # HW accel A20.
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irq 0xf0 = 0x82 # HW accel A20.
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@@ -97,14 +94,13 @@ chip northbridge/intel/i945
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io 0x60 = 0x290
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io 0x60 = 0x290
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irq 0x70 = 0
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irq 0x70 = 0
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end
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end
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end # chip superio/winbond/w83627ehg
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end
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end # LPC bridge
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end
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device pci 1f.1 on end # IDE
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device pci 1f.1 on end # IDE
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device pci 1f.2 on end # SATA
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device pci 1f.2 on end # SATA
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device pci 1f.3 on end # SMBus
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device pci 1f.3 on end # SMBus
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#device pci 1f.4 off end # Realtek ID Codec
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# device pci 1f.4 off end # Realtek ID Codec
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end
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end # chip southbridge/intel/i82801gx
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end
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end
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end # device domain0
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end # chip northbridge/intel/i945
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