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soc/amd: Make espi_configure_decodes private

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This is only ever called after espi_setup.

55861 - AMD System Peripheral Bus Overview also says that io ranges
should be configured before enabling the BUS_MASTER bit.

BUG=b:183524609
TEST=Boot guybrush to OS

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I074e487d8768a578ee889a125b9948e3aa6c7269
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52059
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Raul E Rangel
2021-04-02 10:55:27 -06:00
committed by Raul Rangel
parent c988d0516c
commit 61ac1bc530
5 changed files with 15 additions and 18 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/soc/amd/picasso/early_fch.c
View File

@@ -77,8 +77,6 @@ void fch_early_init(void)
if (CONFIG(DISABLE_SPI_FLASH_ROM_SHARING))
lpc_disable_spi_rom_sharing();
if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) {
if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
espi_setup();
espi_configure_decodes();
}
}

4
src/soc/amd/picasso/psp_verstage/fch.c
View File

@@ -153,8 +153,6 @@ uint32_t verstage_soc_early_init(void)
void verstage_soc_init(void)
{
if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI)) {
if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
espi_setup();
espi_configure_decodes();
}
}