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AGESA: Fix UMA calculations

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Vendorcode decides already in AMD_INIT_POST the exact location
of UMA memory. To meet alignment requirements, it will extend
uma_memory_size. We cannot calculate base from size and TOP_MEM1,
but need to calculate size from base and TOP_MEM1 instead.

Also allows selection of UmaMode==UMA_SPECIFIED to manually set
amount of memory reserved for framebuffer.

Change-Id: I2514c70a331c7fbf0056f22bf64f19c9374754c0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Kyösti Mälkki
2017-04-15 20:07:53 +03:00
parent 17bb225be7
commit 61be3603f4
15 changed files with 105 additions and 307 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
src/southbridge/amd/agesa/hudson/ramtop.c
View File

@@ -26,27 +26,21 @@ int acpi_get_sleep_type(void)
return (int)tmp;
}
#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
#ifndef __PRE_RAM__
void backup_top_of_ram(uint64_t ramtop)
{
u32 dword = (u32) ramtop;
u32 dword = ramtop;
int nvram_pos = 0xf8, i; /* temp */
for (i = 0; i < 4; i++) {
outb(nvram_pos, BIOSRAM_INDEX);
outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA);
outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA);
nvram_pos++;
}
}
#endif
unsigned long get_top_of_ram(void)
{
uint32_t xdata = 0;
int xnvram_pos = 0xf8, xi;
if (acpi_get_sleep_type() != 3)
return 0;
for (xi = 0; xi < 4; xi++) {
outb(xnvram_pos, BIOSRAM_INDEX);
xdata &= ~(0xff << (xi * 8));
@@ -55,5 +49,3 @@ unsigned long get_top_of_ram(void)
}
return (unsigned long) xdata;
}
#endif

2
src/southbridge/amd/cimx/sb700/Makefile.inc
View File

@@ -19,9 +19,11 @@
romstage-y += early.c
romstage-y += smbus.c smbus_spd.c
romstage-y += reset.c
romstage-y += ramtop.c
ramstage-y += late.c
ramstage-y += reset.c
ramstage-y += ramtop.c
ramstage-y += smbus.c
ramstage-y += lpc.c

17
src/southbridge/amd/cimx/sb700/lpc.c
View File

@@ -20,23 +20,6 @@
#include <console/console.h> /* printk */
#include <cbmem.h>
#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
#define BIOSRAM_INDEX 0xcd4
#define BIOSRAM_DATA 0xcd5
void backup_top_of_ram(uint64_t ramtop)
{
u32 dword = (u32) ramtop;
int nvram_pos = 0xfc, i;
for (i = 0; i < 4; i++) {
outb(nvram_pos, BIOSRAM_INDEX);
outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA);
nvram_pos++;
}
}
#endif
void lpc_read_resources(device_t dev)
{
struct resource *res;

43
src/southbridge/amd/cimx/sb700/ramtop.c Normal file
View File

@@ -0,0 +1,43 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <stdint.h>
#include <arch/io.h>
#include <cbmem.h>
#include <southbridge/amd/cimx/cimx_util.h>
void backup_top_of_ram(uint64_t ramtop)
{
u32 dword = ramtop;
int nvram_pos = 0xfc, i;
for (i = 0; i < 4; i++) {
outb(nvram_pos, BIOSRAM_INDEX);
outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA);
nvram_pos++;
}
}
unsigned long get_top_of_ram(void)
{
u32 xdata = 0;
int xnvram_pos = 0xfc, xi;
for (xi = 0; xi < 4; xi++) {
outb(xnvram_pos, BIOSRAM_INDEX);
xdata &= ~(0xff << (xi * 8));
xdata |= inb(BIOSRAM_DATA) << (xi *8);
xnvram_pos++;
}
return (unsigned long) xdata;
}

4
src/southbridge/amd/cimx/sb800/Makefile.inc
View File

@@ -30,8 +30,8 @@ ramstage-$(CONFIG_SB800_IMC_FAN_CONTROL) += fan.c
ramstage-$(CONFIG_SPI_FLASH) += spi.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
romstage-$(CONFIG_HAVE_ACPI_RESUME) += ramtop.c
ramstage-$(CONFIG_HAVE_ACPI_RESUME) += ramtop.c
romstage-y += ramtop.c
ramstage-y += ramtop.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ../../sb800/enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c

12
src/southbridge/amd/cimx/sb800/ramtop.c
View File

@@ -26,27 +26,21 @@ int acpi_get_sleep_type(void)
return (int)tmp;
}
#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
#ifndef __PRE_RAM__
void backup_top_of_ram(uint64_t ramtop)
{
u32 dword = (u32) ramtop;
u32 dword = ramtop;
int nvram_pos = 0xf8, i; /* temp */
for (i = 0; i < 4; i++) {
outb(nvram_pos, BIOSRAM_INDEX);
outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA);
outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA);
nvram_pos++;
}
}
#endif
unsigned long get_top_of_ram(void)
{
u32 xdata = 0;
int xnvram_pos = 0xf8, xi;
if (acpi_get_sleep_type() != 3)
return 0;
for (xi = 0; xi < 4; xi++) {
outb(xnvram_pos, BIOSRAM_INDEX);
xdata &= ~(0xff << (xi * 8));
@@ -55,5 +49,3 @@ unsigned long get_top_of_ram(void)
}
return (unsigned long) xdata;
}
#endif

2
src/southbridge/amd/cimx/sb900/Makefile.inc
View File

@@ -20,11 +20,13 @@ romstage-y += cfg.c
romstage-y += early.c
romstage-y += smbus.c smbus_spd.c
romstage-y += reset.c
romstage-y += ramtop.c
ramstage-y += cfg.c
ramstage-y += early.c
ramstage-y += late.c
ramstage-y += reset.c
ramstage-y += ramtop.c
ramstage-y += smbus.c
ramstage-y += lpc.c

43
src/southbridge/amd/cimx/sb900/ramtop.c Normal file
View File

@@ -0,0 +1,43 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <stdint.h>
#include <arch/io.h>
#include <cbmem.h>
#include <southbridge/amd/cimx/cimx_util.h>
void backup_top_of_ram(uint64_t ramtop)
{
u32 dword = ramtop;
int nvram_pos = 0xf8, i; /* temp */
for (i = 0; i < 4; i++) {
outb(nvram_pos, BIOSRAM_INDEX);
outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA);
nvram_pos++;
}
}
unsigned long get_top_of_ram(void)
{
u32 xdata = 0;
int xnvram_pos = 0xf8, xi;
for (xi = 0; xi < 4; xi++) {
outb(xnvram_pos, BIOSRAM_INDEX);
xdata &= ~(0xff << (xi * 8));
xdata |= inb(BIOSRAM_DATA) << (xi *8);
xnvram_pos++;
}
return (unsigned long) xdata;
}