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soc/amd/stoneyridge,picasso: Select COMMON_FADT

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Change-Id: I0c98bf7f88c33691401ebc6b174d959dd515dd11
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41921
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki
2020-05-30 18:54:39 +03:00
committed by Felix Held
parent 55c0c4bc86
commit 61ef71bcb2
4 changed files with 4 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/soc/amd/picasso/Kconfig
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@@ -55,6 +55,7 @@ config CPU_SPECIFIC_OPTIONS
select UDK_2017_BINDING select UDK_2017_BINDING
select CACHE_MRC_SETTINGS select CACHE_MRC_SETTINGS
select HAVE_CF9_RESET select HAVE_CF9_RESET
select COMMON_FADT
config PRERAM_CBMEM_CONSOLE_SIZE config PRERAM_CBMEM_CONSOLE_SIZE
hex hex

21
src/soc/amd/picasso/acpi.c
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@@ -85,25 +85,10 @@ unsigned long acpi_fill_madt(unsigned long current)
* Reference section 5.2.9 Fixed ACPI Description Table (FADT) * Reference section 5.2.9 Fixed ACPI Description Table (FADT)
* in the ACPI 3.0b specification. * in the ACPI 3.0b specification.
*/ */
void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) void acpi_fill_fadt(acpi_fadt_t *fadt)
{ {
acpi_header_t *header = &(fadt->header);
printk(BIOS_DEBUG, "pm_base: 0x%04x\n", PICASSO_ACPI_IO_BASE); printk(BIOS_DEBUG, "pm_base: 0x%04x\n", PICASSO_ACPI_IO_BASE);
/* Prepare the header */
memset((void *)fadt, 0, sizeof(acpi_fadt_t));
memcpy(header->signature, "FACP", 4);
header->length = sizeof(acpi_fadt_t);
header->revision = get_acpi_table_revision(FADT);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->asl_compiler_revision = asl_revision;
fadt->firmware_ctrl = (u32) facs;
fadt->dsdt = (u32) dsdt;
fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */
fadt->preferred_pm_profile = PM_UNSPECIFIED; fadt->preferred_pm_profile = PM_UNSPECIFIED;
fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */ fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */
@@ -169,8 +154,6 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
fadt->x_firmware_ctl_l = 0; /* set to 0 if firmware_ctrl is used */ fadt->x_firmware_ctl_l = 0; /* set to 0 if firmware_ctrl is used */
fadt->x_firmware_ctl_h = 0; fadt->x_firmware_ctl_h = 0;
fadt->x_dsdt_l = (u32) dsdt;
fadt->x_dsdt_h = 0;
fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_width = 32;
@@ -235,8 +218,6 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.access_size = 0;
fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrl = 0;
fadt->x_gpe1_blk.addrh = 0x0; fadt->x_gpe1_blk.addrh = 0x0;
header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));
} }
void generate_cpu_entries(const struct device *device) void generate_cpu_entries(const struct device *device)

1
src/soc/amd/stoneyridge/Kconfig
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@@ -46,6 +46,7 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER
select SSE2 select SSE2
select RTC select RTC
select COMMON_FADT
config AMD_APU_STONEYRIDGE config AMD_APU_STONEYRIDGE
bool bool

21
src/soc/amd/stoneyridge/acpi.c
View File

@@ -57,25 +57,10 @@ unsigned long acpi_fill_madt(unsigned long current)
* Reference section 5.2.9 Fixed ACPI Description Table (FADT) * Reference section 5.2.9 Fixed ACPI Description Table (FADT)
* in the ACPI 3.0b specification. * in the ACPI 3.0b specification.
*/ */
void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) void acpi_fill_fadt(acpi_fadt_t *fadt)
{ {
acpi_header_t *header = &(fadt->header);
printk(BIOS_DEBUG, "pm_base: 0x%04x\n", STONEYRIDGE_ACPI_IO_BASE); printk(BIOS_DEBUG, "pm_base: 0x%04x\n", STONEYRIDGE_ACPI_IO_BASE);
/* Prepare the header */
memset((void *)fadt, 0, sizeof(acpi_fadt_t));
memcpy(header->signature, "FACP", 4);
header->length = sizeof(acpi_fadt_t);
header->revision = get_acpi_table_revision(FADT);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->asl_compiler_revision = asl_revision;
fadt->firmware_ctrl = (u32) facs;
fadt->dsdt = (u32) dsdt;
fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */
fadt->preferred_pm_profile = PM_UNSPECIFIED; fadt->preferred_pm_profile = PM_UNSPECIFIED;
fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */ fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */
@@ -141,8 +126,6 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
fadt->x_firmware_ctl_l = 0; /* set to 0 if firmware_ctrl is used */ fadt->x_firmware_ctl_l = 0; /* set to 0 if firmware_ctrl is used */
fadt->x_firmware_ctl_h = 0; fadt->x_firmware_ctl_h = 0;
fadt->x_dsdt_l = (u32) dsdt;
fadt->x_dsdt_h = 0;
fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; fadt->x_pm1a_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
fadt->x_pm1a_evt_blk.bit_width = 32; fadt->x_pm1a_evt_blk.bit_width = 32;
@@ -207,8 +190,6 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
fadt->x_gpe1_blk.access_size = 0; fadt->x_gpe1_blk.access_size = 0;
fadt->x_gpe1_blk.addrl = 0; fadt->x_gpe1_blk.addrl = 0;
fadt->x_gpe1_blk.addrh = 0x0; fadt->x_gpe1_blk.addrh = 0x0;
header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));
} }
void generate_cpu_entries(const struct device *device) void generate_cpu_entries(const struct device *device)