soc/amd/cezanne: Start loading APOB asynchronously

This enables COOP_MULTITASKING (i.e., multiple stacks single CPU). This
will allow the APOB to start loading while FSP-S executes.

BUG=b:179699789
TEST=Boot guybrush and verify APOB read timestamp has dropped from 10ms
to a few uS.

Starting APOB preload
APOB thread running
spi_dma_readat_dma: start: dest: 0xcb7aa640, offset: 0x0, size: 65536
 took 0 us to acquire mutex
start_spi_dma_transaction: dest: 0xcb7aa640, offset: 0x0, remaining: 65536

<ramstage doing work>

spi_dma_readat_dma: end: dest: 0xcb7aa640, offset: 0x0, size: 65536, remaining: 0

<more work..>

waiting for thread
 took 0 us
APOB valid copy is already in flash

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I4b5c1ef4cad571d1cbca33b1aff017a3cedc1bea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56234
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/cezanne/Kconfig

@@ -18,6 +18,7 @@ config SOC_SPECIFIC_OPTIONS
 	select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
 	select DRIVERS_USB_ACPI
 	select DRIVERS_I2C_DESIGNWARE
+	select COOP_MULTITASKING
 	select DRIVERS_USB_PCI_XHCI
 	select FSP_COMPRESS_FSP_M_LZMA
 	select FSP_COMPRESS_FSP_S_LZMA
@@ -69,6 +70,7 @@ config SOC_SPECIFIC_OPTIONS
 	select SOC_AMD_COMMON_FSP_DMI_TABLES
 	select SOC_AMD_COMMON_FSP_PCI
 	select SSE2
+	select TIMER_QUEUE
 	select UDK_2017_BINDING
 	select X86_AMD_FIXED_MTRRS
 	select X86_AMD_INIT_SIPI