From 62047e582b0eaed085cf452630c1260f092b8782 Mon Sep 17 00:00:00 2001
From: Kangheui Won <khwon@chromium.org>
Date: Thu, 15 Apr 2021 17:34:09 +1000
Subject: [PATCH] soc/amd/cezanne: fix i2c compiler errors on non-x86

if ENV_X86 is not true we had several compile errors in i2c code. Fix
them before we add code for psp_verstage which is non-x86.

BUG=b:182477057
BRANCH=none
TEST=build

Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: I0796671dd34ab2d0f123c904a88c57cdad116a57
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52538
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/soc/amd/cezanne/i2c.c               |  3 ++-
 src/soc/amd/cezanne/include/soc/i2c.h   |  1 +
 src/soc/amd/cezanne/include/soc/iomap.h | 10 +++++-----
 3 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/src/soc/amd/cezanne/i2c.c b/src/soc/amd/cezanne/i2c.c
index ec6cb0382d..6571ff50bd 100644
--- a/src/soc/amd/cezanne/i2c.c
+++ b/src/soc/amd/cezanne/i2c.c
@@ -2,6 +2,7 @@
 
 #include <amdblocks/acpimmio.h>
 #include <amdblocks/i2c.h>
+#include <console/console.h>
 #include <soc/i2c.h>
 #include <soc/southbridge.h>
 #include "chip.h"
@@ -14,7 +15,7 @@ static const struct soc_i2c_ctrlr_info i2c_ctrlr[I2C_CTRLR_COUNT] = {
 	{ I2C_MASTER_MODE, APU_I2C3_BASE, "I2C3" }
 };
 #else
-static struct soc_i2c_ctrlr_info i2c_ctrlr[I2C_CTRLR_CNT] = {
+static struct soc_i2c_ctrlr_info i2c_ctrlr[I2C_CTRLR_COUNT] = {
 	{ I2C_MASTER_MODE, 0, "" },
 	{ I2C_MASTER_MODE, 0, "" },
 	{ I2C_MASTER_MODE, 0, "" },
diff --git a/src/soc/amd/cezanne/include/soc/i2c.h b/src/soc/amd/cezanne/include/soc/i2c.h
index d69925dfc3..674c8e37b1 100644
--- a/src/soc/amd/cezanne/include/soc/i2c.h
+++ b/src/soc/amd/cezanne/include/soc/i2c.h
@@ -22,5 +22,6 @@
 #define I2C2_SCL_PIN_IOMUX_GPIOxx	GPIO_113_IOMUX_GPIOxx
 #define I2C3_SCL_PIN_IOMUX_GPIOxx	GPIO_19_IOMUX_GPIOxx
 
+void i2c_set_bar(unsigned int bus, uintptr_t bar);
 
 #endif /* AMD_CEZANNE_I2C_H */
diff --git a/src/soc/amd/cezanne/include/soc/iomap.h b/src/soc/amd/cezanne/include/soc/iomap.h
index 8f33794acf..83bb8176fa 100644
--- a/src/soc/amd/cezanne/include/soc/iomap.h
+++ b/src/soc/amd/cezanne/include/soc/iomap.h
@@ -3,6 +3,11 @@
 #ifndef AMD_CEZANNE_IOMAP_H
 #define AMD_CEZANNE_IOMAP_H
 
+#define I2C_MASTER_DEV_COUNT		4
+#define I2C_MASTER_START_INDEX		0
+#define I2C_PERIPHERAL_DEV_COUNT	0 /* TODO: Only master for now. */
+#define I2C_CTRLR_COUNT			(I2C_MASTER_DEV_COUNT + I2C_PERIPHERAL_DEV_COUNT)
+
 #if ENV_X86
 
 /* MMIO Ranges */
@@ -16,11 +21,6 @@
 /* FCH AL2AHB Registers */
 #define ALINK_AHB_ADDRESS		0xfedc0000
 
-#define I2C_MASTER_DEV_COUNT		4
-#define I2C_MASTER_START_INDEX		0
-#define I2C_PERIPHERAL_DEV_COUNT	0 /* TODO: Only master for now. */
-#define I2C_CTRLR_COUNT			(I2C_MASTER_DEV_COUNT + I2C_PERIPHERAL_DEV_COUNT)
-
 #define APU_I2C0_BASE			0xfedc2000
 #define APU_I2C1_BASE			0xfedc3000
 #define APU_I2C2_BASE			0xfedc4000