northbridge/intel/pineview: Add minimal Pineview northbridge

Based on i945.  Tested on Intel D510MO mainboard,
board boots to UART console with this code.

Change-Id: I1d92a1aa6d6d767bda8379807dc26b50b9de75c9
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: http://review.coreboot.org/10073
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Damien Zammit
2015-05-03 21:34:38 +10:00
committed by Patrick Georgi
parent 0cf0805e92
commit 62477931c8
7 changed files with 339 additions and 0 deletions

View File

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#
# This file is part of the coreboot project.
#
# Copyright (C) 2007-2009 coresystems GmbH
# Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
ifeq ($(CONFIG_NORTHBRIDGE_INTEL_PINEVIEW),y)
ramstage-y += ram_calc.c
ramstage-y += acpi.c
romstage-y += ram_calc.c
endif