smm: Update rev 0x30101 SMM revision save state
According to both Haswell and the SandyBridge/Ivybridge BWGs the save state area actually starts at 0x7c00 offset from 0x8000. Update the em64t101_smm_state_save_area_t structure and introduce a define for the offset. Note: I have no idea what eptp is. It's just listed in the haswell BWG. The offsets should not be changed. Change-Id: I38d1d1469e30628a83f10b188ab2fe53d5a50e5a Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2515 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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Ronald G. Minnich
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da3087f67d
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@@ -27,6 +27,9 @@
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/* used only by C programs so far */
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#define SMM_BASE 0xa0000
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#define SMM_ENTRY_OFFSET 0x8000
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#define SMM_SAVE_STATE_BEGIN(x) (SMM_ENTRY_OFFSET + (x))
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#include <types.h>
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typedef struct {
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u16 es_selector;
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@@ -202,11 +205,17 @@ typedef struct {
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/* Intel Revision 30101 SMM State-Save Area
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* Used in SandyBridge/IvyBridge architecture
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* starts @ 0x7d00
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* The following processor architectures use this:
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* - SandyBridge
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* - IvyBridge
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* - Haswell
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*/
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#define SMM_EM64T101_ARCH_OFFSET 0x7c00
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#define SMM_EM64T101_SAVE_STATE_OFFSET \
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SMM_SAVE_STATE_BEGIN(SMM_EM64T101_ARCH_OFFSET)
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typedef struct {
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u8 reserved0[208];
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u8 reserved0[256];
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u8 reserved1[208];
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u32 gdtr_upper_base;
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u32 ldtr_upper_base;
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@@ -219,25 +228,29 @@ typedef struct {
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u64 io_rcx;
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u64 io_rsi;
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u8 reserved1[52];
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u8 reserved2[52];
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u32 shutdown_auto_restart;
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u8 reserved2[8];
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u8 reserved3[8];
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u32 cr4;
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u8 reserved3[72];
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u8 reserved4[72];
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u32 gdtr_base;
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u8 reserved4[4];
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u32 idtr_base;
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u8 reserved5[4];
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u32 idtr_base;
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u8 reserved6[4];
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u32 ldtr_base;
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u8 reserved6[68];
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u8 reserved7[56];
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/* EPTP fields are only on Haswell according to BWGs, but Intel was
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* wise and reused the same revision number. */
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u64 eptp;
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u32 eptp_en;
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u32 cs_base;
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u8 reserved7[4];
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u8 reserved8[4];
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u32 iedbase;
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u8 reserved8[8];
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u8 reserved9[8];
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u32 smbase;
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u32 smm_revision;
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@@ -245,7 +258,7 @@ typedef struct {
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u16 io_restart;
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u16 autohalt_restart;
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u8 reserved9[24];
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u8 reserved10[24];
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u64 r15;
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u64 r14;
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