libpayload arm64: Add library helpers
Add library helpers to access standard arm64 registers. This library also provides functions to directly read/write register based on current el. So, rest of the code doesnt need to keep checking the el and call appropriate function based on that. BUG=chrome-os-partner:31634 BRANCH=None TEST=Libpayload and depthcharge compile successfully for ryu Change-Id: Ibc0ca49f158362d4b7ab2045bf0fbd58ada79360 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 2ca6da580cb51b4c23abdaf04fee2785e5780510 Original-Change-Id: I9b63e04aa26a98bbeb34fdef634776d49454ca8d Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/214575 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8784 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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committed by
Patrick Georgi
parent
3b1ee0387c
commit
635b45d608
@@ -34,6 +34,7 @@
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#include <stdint.h>
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#include <arch/cache.h>
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#include <arch/lib_helpers.h>
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void tlb_invalidate_all(void)
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{
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@@ -60,7 +61,7 @@ unsigned int dcache_line_bytes(void)
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if (line_bytes)
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return line_bytes;
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ccsidr = read_ccsidr();
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ccsidr = raw_read_ccsidr_el1();
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/* [2:0] - Indicates (Log2(number of words in cache line)) - 2 */
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line_bytes = 1 << ((ccsidr & 0x7) + 2); /* words per line */
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line_bytes *= sizeof(unsigned int); /* bytes per word */
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@@ -126,18 +127,18 @@ void dcache_mmu_disable(void)
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uint32_t sctlr;
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dcache_clean_invalidate_all();
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sctlr = read_sctlr_el3();
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sctlr = raw_read_sctlr_el3();
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sctlr &= ~(SCTLR_C | SCTLR_M);
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write_sctlr_el3(sctlr);
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raw_write_sctlr_el3(sctlr);
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}
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void dcache_mmu_enable(void)
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{
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uint32_t sctlr;
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sctlr = read_sctlr_el3();
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sctlr = raw_read_sctlr_el3();
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sctlr |= SCTLR_C | SCTLR_M;
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write_sctlr_el3(sctlr);
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raw_write_sctlr_el3(sctlr);
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}
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void cache_sync_instructions(void)
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