soc/intel/skylake: Add configs for enabling DCI and TraceHub

Add configs for enabling Intel TraceHub and DCI for aid in debugging.

Change-Id: Ic40f9499c0125070049856e242e89024ca5a1c4e
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/18791
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/skylake/chip.h

@@ -157,6 +157,11 @@ struct soc_intel_skylake_config {
 
 	/* Trace Hub function */
 	u8 EnableTraceHub;
+	u32 TraceHubMemReg0Size;
+	u32 TraceHubMemReg1Size;
+
+	/* DCI Enable/Disable */
+	u8 PchDciEn;
 
 	/* Pcie Root Ports */
 	u8 PcieRpEnable[CONFIG_MAX_ROOT_PORTS];