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AGESA: Implement POSTCAR_STAGE

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Move all boards that have moved away from AGESA_LEGACY_WRAPPER
or BINARYPI_LEGACY_WRAPPER to use POSTCAR_STAGE.

We use POSTCAR_STAGE as a conditional in CAR teardown to tell
our MTRR setup is prepared such that invalidation without
writeback is a valid operation.

Change-Id: I3f4e2170054bdb84c72d2f7c956f8d51a6d7f0ca
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2017-09-02 16:41:43 +03:00
parent 8bf978c2aa
commit 63fac81fc8
22 changed files with 213 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/vendorcode/amd/agesa/f12/gcccar.inc
View File

@ -678,7 +678,11 @@ fam12_enable_stack_hook_exit:
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
#if !IS_ENABLED(CONFIG_POSTCAR_STAGE)
wbinvd
#else
invd
#endif
mov %bx, %ax # Restore INVD -> WBINVD bit
_WRMSR

4
src/vendorcode/amd/agesa/f14/gcccar.inc
View File

@ -826,7 +826,11 @@ fam14_enable_stack_hook_exit:
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
#if !IS_ENABLED(CONFIG_POSTCAR_STAGE)
wbinvd
#else
invd
#endif
bts $INVD_WBINVD, %eax # Turn on Conversion of INVD to WBINVD
_WRMSR

4
src/vendorcode/amd/agesa/f15/gcccar.inc
View File

@ -433,7 +433,11 @@ fam10_enable_stack_hook_exit:
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
#if !IS_ENABLED(CONFIG_POSTCAR_STAGE)
wbinvd
#else
invd
#endif
mov %bx, %ax # Restore INVD -> WBINVD bit
_WRMSR

4
src/vendorcode/amd/agesa/f15tn/gcccar.inc
View File

@ -1263,7 +1263,11 @@ fam15_disable_stack_remote_read_exit:
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
#if !IS_ENABLED(CONFIG_POSTCAR_STAGE)
wbinvd
#else
invd
#endif
#.if (bh == 01h) || (bh == 03h) ; Is this TN or KM?
cmp $01, %bh

4
src/vendorcode/amd/agesa/f16kb/gcccar.inc
View File

@ -615,7 +615,11 @@ fam16_disable_stack_remote_read_exit:
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
#if !IS_ENABLED(CONFIG_POSTCAR_STAGE)
wbinvd
#else
invd
#endif
#Do Standard Family 16 work
mov $HWCR, %ecx # MSR:C001_0015h

4
src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc
View File

@ -916,7 +916,11 @@ fam15_disable_stack_remote_read_exit:
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
#if !IS_ENABLED(CONFIG_POSTCAR_STAGE)
wbinvd
#else
invd
#endif
#.if (bh == 01h) || (bh == 03h) ; Is this TN or KV?
cmp $01, %bh

4
src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc
View File

@ -651,7 +651,11 @@ fam15_disable_stack_remote_read_exit:
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
#if !IS_ENABLED(CONFIG_POSTCAR_STAGE)
wbinvd
#else
invd
#endif
# #.if (bh == 01h) || (bh == 03h) ; Is this TN or KM?
# cmp $01, %bh

4
src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc
View File

@ -615,7 +615,11 @@ fam16_disable_stack_remote_read_exit:
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
#if !IS_ENABLED(CONFIG_POSTCAR_STAGE)
wbinvd
#else
invd
#endif
#Do Standard Family 16 work
mov $HWCR, %ecx # MSR:C001_0015h

2
src/vendorcode/amd/pi/Makefile.inc
View File

@ -85,7 +85,9 @@ export AGESA_CFLAGS := $(AGESA_CFLAGS)
CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
CC_postcar:= $(CC_postcar) -I$(AGESA_ROOT)/binaryPI
CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
CC_x86_64 := $(CC_x86_64) $(AGESA_INC) $(AGESA_CFLAGS)