compiler.h: add __weak macro

Instead of writing out '__attribute__((weak))' use a shorter form.

Change-Id: If418a1d55052780077febd2d8f2089021f414b91
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25767
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Justin TerAvest <teravest@chromium.org>

src/arch/arm/stages.c

@@ -26,11 +26,12 @@
 
 #include <arch/stages.h>
 #include <arch/cache.h>
+#include <compiler.h>
 
 /**
  * generic stage entry point. override this if board specific code is needed.
  */
-__attribute__((weak)) void stage_entry(void)
+__weak void stage_entry(void)
 {
 	main();
 }

src/arch/arm64/arm_tf.c

@@ -21,6 +21,7 @@
 #include <assert.h>
 #include <cbfs.h>
 #include <cbmem.h>
+#include <compiler.h>
 #include <program_loading.h>
 
 /*
@@ -36,7 +37,7 @@ static entry_point_info_t bl32_ep_info;
 static entry_point_info_t bl33_ep_info;
 static bl31_params_t bl31_params;
 
-void __attribute__((weak)) *soc_get_bl31_plat_params(bl31_params_t *params)
+void __weak *soc_get_bl31_plat_params(bl31_params_t *params)
 {
 	/* Default weak implementation. */
 	return NULL;

src/arch/arm64/boot.c

@@ -19,6 +19,7 @@
 #include <arch/transition.h>
 #include <arm_tf.h>
 #include <cbmem.h>
+#include <compiler.h>
 #include <console/console.h>
 #include <program_loading.h>
 #include <rules.h>
@@ -78,7 +79,7 @@ int arch_supports_bounce_buffer(void)
 }
 
 /* Generic stage entry point. Can be overridden by board/SoC if needed. */
-__attribute__((weak)) void stage_entry(void)
+__weak void stage_entry(void)
 {
 	main();
 }

src/arch/arm64/transition.c

@@ -17,6 +17,7 @@
 #include <arch/lib_helpers.h>
 #include <arch/transition.h>
 #include <assert.h>
+#include <compiler.h>
 #include <console/console.h>
 
 /* Litte-endian, No XN-forced, Instr cache disabled,
@@ -27,7 +28,7 @@
 		     SCTLR_CACHE_DISABLE | SCTLR_SAE_DISABLE | SCTLR_RES1 | \
 		     SCTLR_ICE_DISABLE | SCTLR_WXN_DISABLE | SCTLR_LITTLE_END)
 
-void __attribute__((weak)) exc_dispatch(struct exc_state *exc_state, uint64_t id)
+void __weak exc_dispatch(struct exc_state *exc_state, uint64_t id)
 {
 	/* Default weak implementation does nothing. */
 }

src/arch/x86/acpi.c

@@ -44,6 +44,7 @@
 #include <arch/acpigen.h>
 #include <device/pci.h>
 #include <cbmem.h>
+#include <compiler.h>
 #include <cpu/x86/lapic_def.h>
 #include <cpu/cpu.h>
 #include <cbfs.h>
@@ -971,7 +972,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
 }
 #endif
 
-unsigned long __attribute__((weak)) fw_cfg_acpi_tables(unsigned long start)
+unsigned long __weak fw_cfg_acpi_tables(unsigned long start)
 {
 	return 0;
 }
@@ -1238,7 +1239,7 @@ void acpi_save_gnvs(u32 gnvs_address)
 		*gnvs = gnvs_address;
 }
 
-__attribute__((weak)) int acpi_get_gpe(int gpe)
+__weak int acpi_get_gpe(int gpe)
 {
 	return -1; /* implemented by SOC */
 }

src/arch/x86/acpi_s3.c

@@ -17,6 +17,7 @@
 #include <string.h>
 #include <arch/acpi.h>
 #include <cbmem.h>
+#include <compiler.h>
 #include <cpu/cpu.h>
 #include <fallback.h>
 #include <timestamp.h>
@@ -218,7 +219,7 @@ static void acpi_jump_to_wakeup(void *vector)
 	acpi_do_wakeup((uintptr_t)vector, source, target, size);
 }
 
-void __attribute__((weak)) mainboard_suspend_resume(void)
+void __weak mainboard_suspend_resume(void)
 {
 }
 

src/arch/x86/acpigen.c

@@ -28,6 +28,7 @@
 #include <lib.h>
 #include <string.h>
 #include <arch/acpigen.h>
+#include <compiler.h>
 #include <console/console.h>
 #include <device/device.h>
 
@@ -1504,28 +1505,28 @@ void acpigen_write_rom(void *bios, const size_t length)
 
 
 /* Soc-implemented functions -- weak definitions. */
-int __attribute__((weak)) acpigen_soc_read_rx_gpio(unsigned int gpio_num)
+int __weak acpigen_soc_read_rx_gpio(unsigned int gpio_num)
 {
 	printk(BIOS_ERR, "ERROR: %s not implemented\n", __func__);
 	acpigen_write_debug_string("read_rx_gpio not available");
 	return -1;
 }
 
-int __attribute__((weak)) acpigen_soc_get_tx_gpio(unsigned int gpio_num)
+int __weak acpigen_soc_get_tx_gpio(unsigned int gpio_num)
 {
 	printk(BIOS_ERR, "ERROR: %s not implemented\n", __func__);
 	acpigen_write_debug_string("get_tx_gpio not available");
 	return -1;
 }
 
-int __attribute__((weak)) acpigen_soc_set_tx_gpio(unsigned int gpio_num)
+int __weak acpigen_soc_set_tx_gpio(unsigned int gpio_num)
 {
 	printk(BIOS_ERR, "ERROR: %s not implemented\n", __func__);
 	acpigen_write_debug_string("set_tx_gpio not available");
 	return -1;
 }
 
-int __attribute__((weak)) acpigen_soc_clear_tx_gpio(unsigned int gpio_num)
+int __weak acpigen_soc_clear_tx_gpio(unsigned int gpio_num)
 {
 	printk(BIOS_ERR, "ERROR: %s not implemented\n", __func__);
 	acpigen_write_debug_string("clear_tx_gpio not available");

src/arch/x86/cbmem.c

@@ -14,17 +14,18 @@
 #include <stdlib.h>
 #include <console/console.h>
 #include <cbmem.h>
+#include <compiler.h>
 #include <arch/acpi.h>
 
 #if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
 
-void __attribute__((weak)) backup_top_of_low_cacheable(uintptr_t ramtop)
+void __weak backup_top_of_low_cacheable(uintptr_t ramtop)
 {
 	/* Do nothing. Chipset may have implementation to save ramtop in NVRAM.
 	 */
 }
 
-uintptr_t __attribute__((weak)) restore_top_of_low_cacheable(void)
+uintptr_t __weak restore_top_of_low_cacheable(void)
 {
 	return 0;
 }
@@ -43,7 +44,7 @@ void set_late_cbmem_top(uintptr_t ramtop)
 }
 
 /* Top of CBMEM is at highest usable DRAM address below 4GiB. */
-uintptr_t __attribute__((weak)) restore_cbmem_top(void)
+uintptr_t __weak restore_cbmem_top(void)
 {
 	if (IS_ENABLED(CONFIG_LATE_CBMEM_INIT) && ENV_ROMSTAGE)
 		if (!acpi_is_wakeup_s3())

src/arch/x86/mpspec.c

@@ -17,6 +17,7 @@
 #include <device/path.h>
 #include <device/pci_ids.h>
 #include <cpu/cpu.h>
+#include <compiler.h>
 #include <arch/smp/mpspec.h>
 #include <string.h>
 #include <arch/cpu.h>
@@ -523,7 +524,7 @@ void *mptable_finalize(struct mp_config_table *mc)
 	return smp_next_mpe_entry(mc);
 }
 
-unsigned long __attribute__((weak)) write_smp_table(unsigned long addr)
+unsigned long __weak write_smp_table(unsigned long addr)
 {
 	struct drivers_generic_ioapic_config *ioapic_config;
 	struct mp_config_table *mc;

src/arch/x86/pirq_routing.c

@@ -15,12 +15,13 @@
  * GNU General Public License for more details.
  */
 #include <console/console.h>
+#include <compiler.h>
 #include <arch/pirq_routing.h>
 #include <string.h>
 #include <device/pci.h>
 #include <arch/pirq_routing.h>
 
-void __attribute__((weak)) pirq_assign_irqs(const unsigned char pirq[CONFIG_MAX_PIRQ_LINKS])
+void __weak pirq_assign_irqs(const unsigned char pirq[CONFIG_MAX_PIRQ_LINKS])
 {
 }
 

src/arch/x86/postcar.c

@@ -15,6 +15,7 @@
 
 #include <arch/cpu.h>
 #include <cbmem.h>
+#include <compiler.h>
 #include <console/console.h>
 #include <main_decl.h>
 #include <program_loading.h>
@@ -24,7 +25,7 @@
  * Systems without a native coreboot cache-as-ram teardown may implement
  * this to use an alternate method.
  */
-__attribute__((weak)) void late_car_teardown(void) { /* do nothing */ }
+__weak void late_car_teardown(void) { /* do nothing */ }
 
 void main(void)
 {

src/arch/x86/smbios.c

@@ -19,6 +19,7 @@
 #include <stdlib.h>
 #include <string.h>
 #include <smbios.h>
+#include <compiler.h>
 #include <console/console.h>
 #include <version.h>
 #include <device/device.h>
@@ -330,7 +331,7 @@ static int create_smbios_type17_for_dimm(struct dimm_info *dimm,
 	return t->length + smbios_string_table_len(t->eos);
 }
 
-const char *__attribute__((weak)) smbios_mainboard_bios_version(void)
+const char *__weak smbios_mainboard_bios_version(void)
 {
 	if (strlen(CONFIG_LOCALVERSION))
 		return CONFIG_LOCALVERSION;
@@ -397,53 +398,53 @@ static int smbios_write_type0(unsigned long *current, int handle)
 
 #if !IS_ENABLED(CONFIG_SMBIOS_PROVIDED_BY_MOBO)
 
-const char *__attribute__((weak)) smbios_mainboard_serial_number(void)
+const char *__weak smbios_mainboard_serial_number(void)
 {
 	return CONFIG_MAINBOARD_SERIAL_NUMBER;
 }
 
-const char *__attribute__((weak)) smbios_mainboard_version(void)
+const char *__weak smbios_mainboard_version(void)
 {
 	return CONFIG_MAINBOARD_VERSION;
 }
 
-const char *__attribute__((weak)) smbios_mainboard_manufacturer(void)
+const char *__weak smbios_mainboard_manufacturer(void)
 {
 	return CONFIG_MAINBOARD_SMBIOS_MANUFACTURER;
 }
 
-const char *__attribute__((weak)) smbios_mainboard_product_name(void)
+const char *__weak smbios_mainboard_product_name(void)
 {
 	return CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME;
 }
 
-void __attribute__((weak)) smbios_mainboard_set_uuid(u8 *uuid)
+void __weak smbios_mainboard_set_uuid(u8 *uuid)
 {
 	/* leave all zero */
 }
 #endif
 
-const char *__attribute__((weak)) smbios_mainboard_asset_tag(void)
+const char *__weak smbios_mainboard_asset_tag(void)
 {
 	return "";
 }
 
-u8 __attribute__((weak)) smbios_mainboard_feature_flags(void)
+u8 __weak smbios_mainboard_feature_flags(void)
 {
 	return 0;
 }
 
-const char *__attribute__((weak)) smbios_mainboard_location_in_chassis(void)
+const char *__weak smbios_mainboard_location_in_chassis(void)
 {
 	return "";
 }
 
-smbios_board_type __attribute__((weak)) smbios_mainboard_board_type(void)
+smbios_board_type __weak smbios_mainboard_board_type(void)
 {
 	return SMBIOS_BOARD_TYPE_UNKNOWN;
 }
 
-const char *__attribute__((weak)) smbios_mainboard_sku(void)
+const char *__weak smbios_mainboard_sku(void)
 {
 	return "";
 }

src/arch/x86/timestamp.c

@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 
+#include <compiler.h>
 #include <cpu/x86/tsc.h>
 #include <timestamp.h>
 
@@ -21,7 +22,7 @@ uint64_t timestamp_get(void)
 	return rdtscll();
 }
 
-unsigned long __attribute__((weak)) tsc_freq_mhz(void)
+unsigned long __weak tsc_freq_mhz(void)
 {
 	/* Default to not knowing TSC frequency. cbmem will have to fallback
 	 * on trying to determine it in userspace. */