speedstep: Deduplicate some MSR identifiers

In particular:
MSR_PMG_CST_CONFIG_CONTROL
MSR_PMG_IO_BASE_ADDR
MSR_PMG_IO_CAPTURE_ADDR

Change-Id: Ief2697312f0edf8c45f7d3550a7bedaff1b69dc6
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2337
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/cpu/intel/model_206ax/finalize.c

@@ -22,6 +22,7 @@
 #include <stdlib.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/msr.h>
+#include <cpu/intel/speedstep.h>
 #include "model_206ax.h"
 
 static void msr_set_bit(unsigned reg, unsigned bit)

src/cpu/intel/model_206ax/model_206ax.h

@@ -48,8 +48,6 @@
 #define MSR_PIC_MSG_CONTROL		0x2e
 #define MSR_PLATFORM_INFO		0xce
 #define  PLATFORM_INFO_SET_TDP		(1 << 29)
-#define MSR_PMG_CST_CONFIG_CONTROL	0xe2
-#define MSR_PMG_IO_CAPTURE_BASE		0xe4
 
 #define MSR_MISC_PWR_MGMT		0x1aa
 #define  MISC_PWR_MGMT_EIST_HW_DIS	(1 << 0)

src/cpu/intel/model_206ax/model_206ax_init.c

@@ -316,11 +316,11 @@ static void configure_c_states(void)
 	msr.lo |= 7;		// No package C-state limit
 	wrmsr(MSR_PMG_CST_CONFIG_CONTROL, msr);
 
-	msr = rdmsr(MSR_PMG_IO_CAPTURE_BASE);
+	msr = rdmsr(MSR_PMG_IO_CAPTURE_ADDR);
 	msr.lo &= ~0x7ffff;
 	msr.lo |= (PMB0_BASE + 4);	// LVL_2 base address
 	msr.lo |= (2 << 16);		// CST Range: C7 is max C-state
-	wrmsr(MSR_PMG_IO_CAPTURE_BASE, msr);
+	wrmsr(MSR_PMG_IO_CAPTURE_ADDR, msr);
 
 	msr = rdmsr(MSR_MISC_PWR_MGMT);
 	msr.lo &= ~(1 << 0);	// Enable P-state HW_ALL coordination