copy_and_run: drop boot_complete parameter

Since this parameter is not used anymore, drop it from
all calls to copy_and_run()

Change-Id: Ifba25aff4b448c1511e26313fe35007335aa7f7a
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/3213
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

src/cpu/intel/car/cache_as_ram.inc

@@ -357,17 +357,12 @@ lout:
 	andl	$(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
 	movl	%eax, %cr0
 
-	/* Clear boot_complete flag. */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 	cld			/* Clear direction flag. */
 
-	movl	%ebp, %esi
-
 	movl	$ROMSTAGE_STACK, %esp
 	movl	%esp, %ebp
-	pushl	%esi
 	call	copy_and_run
 
 .Lhlt:

src/cpu/intel/car/cache_as_ram_ht.inc

@@ -431,17 +431,12 @@ no_msr_11e:
 
 	post_code(0x3c)
 
-	/* Clear boot_complete flag. */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 	cld			/* Clear direction flag. */
 
-	movl	%ebp, %esi
-
 	movl	$ROMSTAGE_STACK, %esp
 	movl	%esp, %ebp
-	pushl	%esi
 	call	copy_and_run
 
 .Lhlt:

src/cpu/intel/haswell/romstage.c

@@ -326,7 +326,7 @@ void romstage_after_car(void)
 #endif
 
 	/* Load the ramstage. */
-	copy_and_run(0);
+	copy_and_run();
 }
 
 

src/cpu/intel/model_206ax/cache_as_ram.inc

@@ -316,17 +316,12 @@ __acpi_resume_backup_done:
 
 	post_code(0x3d)
 
-	/* Clear boot_complete flag. */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 	cld			/* Clear direction flag. */
 
-	movl	%ebp, %esi
-
 	movl	$ROMSTAGE_STACK, %esp
 	movl	%esp, %ebp
-	pushl	%esi
 	call	copy_and_run
 
 .Lhlt:

src/cpu/intel/model_6ex/cache_as_ram.inc

@@ -225,17 +225,12 @@ clear_mtrrs:
 
 	post_code(0x3c)
 
-	/* Clear boot_complete flag. */
-	xorl	%ebp, %ebp
 __main:
 	post_code(POST_PREPARE_RAMSTAGE)
 	cld			/* Clear direction flag. */
 
-	movl	%ebp, %esi
-
 	movl	$ROMSTAGE_STACK, %esp
 	movl	%esp, %ebp
-	pushl	%esi
 	call	copy_and_run
 
 .Lhlt: