From 649426539b73e4ada1eb0631bfa3b02be75dfd02 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sat, 4 Mar 2023 03:33:54 +0100 Subject: [PATCH] soc/amd/common/cpu/Kconfig: use Cxxx as CPU string for all non-CAR SoCs Picasso already uses the Cxxx ACPI CPU device naming scheme, due to it being what the AGESA reference code uses. We initially relied on the AGESA/FSP generated SSDT for the P- and C-state support before we had a native implementation for this in coreboot. The Cxxx naming scheme can also be used for the other AMD SoCs except Stoneyridge which is pre-Zen and doesn't select SOC_AMD_COMMON_BLOCK_NONCAR. The main advantage of using Cxxx instead of CPxx is that the Cxxx scheme supports systems with more than 256 CPU threads. Signed-off-by: Felix Held Change-Id: I884f5c0f234b5a3942dacd60847b2f095f9c0704 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73620 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/soc/amd/common/block/cpu/Kconfig | 4 ++++ src/soc/amd/picasso/Kconfig | 4 ---- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/soc/amd/common/block/cpu/Kconfig b/src/soc/amd/common/block/cpu/Kconfig index cdd5c3a69e..f7583e720a 100644 --- a/src/soc/amd/common/block/cpu/Kconfig +++ b/src/soc/amd/common/block/cpu/Kconfig @@ -33,6 +33,10 @@ config CBFS_CACHE_SIZE help The size of the cbfs_cache region. +config ACPI_CPU_STRING + string + default "\\_SB.C%03d" + endif # SOC_AMD_COMMON_BLOCK_NONCAR config SOC_AMD_COMMON_BLOCK_MCA_COMMON diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 9e4f0f5516..325a65a166 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -296,10 +296,6 @@ config SMM_MODULE_STACK_SIZE hex default 0x800 -config ACPI_CPU_STRING - string - default "\\_SB.C%03d" - config ACPI_BERT bool "Build ACPI BERT Table" default y