soc/amd: Add an option to select if SOC supports ESPI sub decode

Cezanne doesn't have eSPIx00034 register define in PPR. Currently only
Picasso need this option.

Change-Id: Icb8e8a1a59393849395125108bfaa884839ce10f
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48842
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Zheng Bao 2020-12-21 13:56:22 +08:00 committed by Felix Held
parent 56868b8045
commit 64d0ad347b
3 changed files with 8 additions and 1 deletions

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@ -24,3 +24,8 @@ config SOC_AMD_COMMON_BLOCK_USE_ESPI
help help
Select this option if mainboard uses eSPI instead of LPC (if supported Select this option if mainboard uses eSPI instead of LPC (if supported
by platform). by platform).
config SOC_AMD_COMMON_BLOCK_HAS_ESPI_SUB_DECODE
bool
depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI
default n

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@ -916,6 +916,7 @@ int espi_setup(void)
} }
/* Enable subtractive decode if configured */ /* Enable subtractive decode if configured */
if (CONFIG(SOC_AMD_COMMON_BLOCK_HAS_ESPI_SUB_DECODE))
espi_setup_subtractive_decode(cfg); espi_setup_subtractive_decode(cfg);
return 0; return 0;

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@ -29,6 +29,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_AMD_COMMON select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK_NONCAR select SOC_AMD_COMMON_BLOCK_NONCAR
select SOC_AMD_COMMON_BLOCK_HAS_ESPI select SOC_AMD_COMMON_BLOCK_HAS_ESPI
select SOC_AMD_COMMON_BLOCK_HAS_ESPI_SUB_DECODE
select SOC_AMD_COMMON_BLOCK_IOMMU select SOC_AMD_COMMON_BLOCK_IOMMU
select SOC_AMD_COMMON_BLOCK_ACPIMMIO select SOC_AMD_COMMON_BLOCK_ACPIMMIO
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS