security/tpm: Move tpm TSS and TSPI layer to security section
* Move code from src/lib and src/include into src/security/tpm * Split TPM TSS 1.2 and 2.0 * Fix header includes * Add a new directory structure with kconfig and makefile includes Change-Id: Id15a9aa6bd367560318dfcfd450bf5626ea0ec2b Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/22103 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Stefan Reinauer
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4fef7818ec
commit
64e2d19082
@@ -53,16 +53,6 @@ verstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
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verstage-y += boot_device.c
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verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
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verstage-$(CONFIG_TPM) += tlcl.c
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verstage-$(CONFIG_TPM2) += tpm2_marshaling.c
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verstage-$(CONFIG_TPM2) += tpm2_tlcl.c
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ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
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romstage-$(CONFIG_TPM) += tlcl.c
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romstage-$(CONFIG_TPM2) += tpm2_marshaling.c
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romstage-$(CONFIG_TPM2) += tpm2_tlcl.c
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endif # CONFIG_VBOOT_SEPARATE_VERSTAGE
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verstage-$(CONFIG_GENERIC_UDELAY) += timer.c
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verstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c
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@@ -144,8 +134,6 @@ ramstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c
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ramstage-$(CONFIG_GENERIC_UDELAY) += timer.c
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ramstage-y += b64_decode.c
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ramstage-$(CONFIG_ACPI_NHLT) += nhlt.c
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ramstage-$(CONFIG_TPM2) += tpm2_marshaling.c
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ramstage-$(CONFIG_TPM2) += tpm2_tlcl.c
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romstage-y += cbmem_common.c
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romstage-y += imd_cbmem.c
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