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soc/intel/xeon_sp: Set SMI lock

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Prevent writes to Global SMI enable as recommended by the BWG.

Change-Id: I7824464e53a2ca1e860c1aa40d8a7d26e948c418
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51226
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Marc Jones
2021-03-02 15:16:25 -07:00
committed by Marc Jones
parent 81ef9c21da
commit 6545145f0d
1 changed files with 17 additions and 2 deletions
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19
src/soc/intel/xeon_sp/lockdown.c
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@@ -16,7 +16,19 @@ static void lpc_lockdown_config(int chipset_lockdown)
} }
} }
static void pmc_lockdown_config(void) static void pmc_lock_smi(void)
{
uint8_t *pmcbase;
uint8_t reg8;
pmcbase = pmc_mmio_regs();
reg8 = read8(pmcbase + GEN_PMCON_A);
reg8 |= SMI_LOCK;
write8(pmcbase + GEN_PMCON_A, reg8);
}
static void pmc_lockdown_config(int chipset_lockdown)
{ {
uint8_t *pmcbase; uint8_t *pmcbase;
u32 pmsyncreg; u32 pmsyncreg;
@@ -29,6 +41,9 @@ static void pmc_lockdown_config(void)
/* Make sure payload/OS can't trigger global reset */ /* Make sure payload/OS can't trigger global reset */
pmc_global_reset_disable_and_lock(); pmc_global_reset_disable_and_lock();
if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT)
pmc_lock_smi();
} }
void soc_lockdown_config(int chipset_lockdown) void soc_lockdown_config(int chipset_lockdown)
@@ -37,5 +52,5 @@ void soc_lockdown_config(int chipset_lockdown)
lpc_lockdown_config(chipset_lockdown); lpc_lockdown_config(chipset_lockdown);
/* PMC lock down configuration */ /* PMC lock down configuration */
pmc_lockdown_config(); pmc_lockdown_config(chipset_lockdown);
} }