nb/intel/pineview: Guard DMIBAR/EPBAR macro parameters
Add brackets around the parameters to avoid operation order problems. Tested with BUILD_TIMELESS=1, Foxconn D41S remains identical. Change-Id: I347466f56d3d5fb3793b3a25e4a825c844e50d42 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45386 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@@ -59,17 +59,17 @@
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* EPBAR - Egress Port Root Complex Register Block
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* EPBAR - Egress Port Root Complex Register Block
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*/
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*/
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#define EPBAR8(x) *((volatile u8 *)(DEFAULT_EPBAR + x))
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#define EPBAR8(x) *((volatile u8 *)(DEFAULT_EPBAR + (x)))
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#define EPBAR16(x) *((volatile u16 *)(DEFAULT_EPBAR + x))
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#define EPBAR16(x) *((volatile u16 *)(DEFAULT_EPBAR + (x)))
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#define EPBAR32(x) *((volatile u32 *)(DEFAULT_EPBAR + x))
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#define EPBAR32(x) *((volatile u32 *)(DEFAULT_EPBAR + (x)))
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/*
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/*
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* DMIBAR
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* DMIBAR
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*/
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*/
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#define DMIBAR8(x) *((volatile u8 *)(DEFAULT_DMIBAR + x))
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#define DMIBAR8(x) *((volatile u8 *)(DEFAULT_DMIBAR + (x)))
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#define DMIBAR16(x) *((volatile u16 *)(DEFAULT_DMIBAR + x))
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#define DMIBAR16(x) *((volatile u16 *)(DEFAULT_DMIBAR + (x)))
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#define DMIBAR32(x) *((volatile u32 *)(DEFAULT_DMIBAR + x))
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#define DMIBAR32(x) *((volatile u32 *)(DEFAULT_DMIBAR + (x)))
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enum fsb_clk {
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enum fsb_clk {
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FSB_CLOCK_667MHz = 0,
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FSB_CLOCK_667MHz = 0,
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