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src, util: Clean up makefile.inc in text, help & comments

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Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ib69236fb5d68272f92405512dc231fa75ecccaa6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Martin Roth
2024-01-18 19:06:14 -07:00
committed by Felix Held
parent 0825d90467
commit 659f97c621
13 changed files with 17 additions and 17 deletions
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2
src/mainboard/cavium/cn8100_sff_evb/board.fmd
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@@ -6,7 +6,7 @@ FLASH@0x0 8M {
FMAP@0x0 0x1000
# bootblock includes trusted/non-trusted CLIB, CSIB,
# and BL1FWs packaged in
# src/soc/cavium/common/Makefile.inc.
# src/soc/cavium/common/Makefile.mk.
BOOTBLOCK@0x10000 0x70000
COREBOOT(CBFS)@0x80000 0x77c000
}

2
src/mainboard/google/glados/variants/asuka/variant.c
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@@ -38,6 +38,6 @@ void variant_memory_init_params(FSPM_UPD *mupd, const int spd_index)
int is_dual_channel(const int spd_index)
{
/* Per Makefile.inc, dual channel indices 1,3,5 */
/* Per Makefile.mk, dual channel indices 1,3,5 */
return (spd_index & 0x1);
}

2
src/mainboard/google/nyan_big/bct/Makefile.mk
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@@ -5,5 +5,5 @@ bct-cfg-$(CONFIG_NYAN_BIG_BCT_CFG_SPI) += spi.cfg
bct-cfg-y += odmdata.cfg
# Note when SDRAM config (sdram-*.cfg) files are changed, we have to regenerate
# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.inc for more
# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.mk for more
# information.

2
src/mainboard/google/nyan_blaze/bct/Makefile.mk
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@@ -5,5 +5,5 @@ bct-cfg-$(CONFIG_NYAN_BLAZE_BCT_CFG_SPI) += spi.cfg
bct-cfg-y += odmdata.cfg
# Note when SDRAM config (sdram-*.cfg) files are changed, we have to regenerate
# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.inc for more
# the include files (sdram-*.inc). See ../../nyan/bct/Makefile.mk for more
# information.

2
src/mainboard/intel/strago/Kconfig
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@@ -35,7 +35,7 @@ config VGA_BIOS_ID
default "8086,22b0"
help
The VGA_BIOS_ID for the C0 version of the video BIOS is hardcoded
in soc/intel/braswell/Makefile.inc as 8086,22b1
in soc/intel/braswell/Makefile.mk as 8086,22b1
config CBFS_SIZE
default 0x200000

2
src/mainboard/opencellular/elgon/board.fmd
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@@ -6,7 +6,7 @@ FLASH@0x0 16M {
FMAP@0x0 0x1000
# bootblock includes trusted/non-trusted CLIB, CSIB,
# and BL1FWs packaged in
# src/soc/cavium/common/Makefile.inc.
# src/soc/cavium/common/Makefile.mk.
BOOTBLOCK@0x10000 0x70000
COREBOOT(CBFS)@0x80000 0xf7c000
}

2
src/mainboard/opencellular/elgon/vboot.fmd
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@@ -8,7 +8,7 @@ FLASH@0x0 16M {
RO_FRID@0x1000 0x100
# bootblock includes trusted/non-trusted CLIB, CSIB,
# and BL1FWs packaged in
# src/soc/cavium/common/Makefile.inc.
# src/soc/cavium/common/Makefile.mk.
BOOTBLOCK@0x10000 0x70000
COREBOOT(CBFS)@0x80000 0x2fc000
GBB@0x37c000 0x80000

2
src/mainboard/protectli/vault_bsw/Kconfig
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@@ -57,7 +57,7 @@ config VGA_BIOS_ID
default "8086,22b0"
help
The VGA_BIOS_ID for the C0 version of the video bios is hardcoded
in soc/intel/braswell/Makefile.inc as 8086,22b1
in soc/intel/braswell/Makefile.mk as 8086,22b1
endif #RUN_FSP_GOP

2
src/mainboard/siemens/mc_apl1/Makefile.mk
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@@ -4,7 +4,7 @@ bootblock-y += bootblock.c
# The inclusion of romstage.c is not necessary here.
# It is put down only to the better understanding.
# The file is already included over src/arch/x86/Makefile.inc.
# The file is already included over src/arch/x86/Makefile.mk.
romstage-y += romstage.c
ramstage-y += mainboard.c