From 65b64b3f03b74b418bdfc8e21fbd6a4a30ca2be4 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 26 Apr 2023 16:36:05 +0530 Subject: [PATCH] =?UTF-8?q?soc/intel/alderlake:=20Select=C2=A0FSP=5FMULTIP?= =?UTF-8?q?HASE=5FSI=5FINIT=5FRETURN=5FBROKEN=20config?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit At present the problem has only been reported with Alder Lake and Raptor Lake FSP where MultiPhaseSiInit API is unable to return any ERROR status. Hence, this patch ensures to select applicable W/A config to read FSP return status from the FSP Reset HOB. BUG=b:278665768 TEST=Able to select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN for ADL/RPL SoC code and call into this API to know the return status from MultiPhaseSiInit FSP API. Without this patch: IshInit() Start IshDisable() Start IshPerformGlobalReset() .... .... FSP returning control to Bootloader with reset required return status 40000003 FspMultiPhaseSiInit Index-1 returned 0 <-- after control returns into coreboot, the `status` from the FSP API is reset to `0` instead 0x40000003. Hence, coreboot avoid hitting the reset. With this patch: IshInit() Start IshDisable() Start IshPerformGlobalReset() .... .... FSP returning control to Bootloader with reset required return status 40000003 FSP: handling reset type 40000003 <-- coreboot is able to understand the reset request in proper. GLOBAL RESET! global_reset() called! HECI: Global Reset(Type:1) Command Signed-off-by: Subrata Banik Change-Id: I18a918cca7e19e03ed6020c55c86c64a94212963 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74785 Reviewed-by: Arthur Heymans Reviewed-by: Tarun Tuli Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) Reviewed-by: Kapil Porwal --- src/soc/intel/alderlake/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index cce20524dd..0e5a671be2 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -61,6 +61,7 @@ config CPU_SPECIFIC_OPTIONS select FSP_COMPRESS_FSP_S_LZ4 select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW select FSP_M_XIP + select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN select FSP_STATUS_GLOBAL_RESET_REQUIRED_3 select FSP_USES_CB_DEBUG_EVENT_HANDLER select FSPS_HAS_ARCH_UPD