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soc/skylake: Make VT-d controllable from CMOS option

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Make VT-d enable or disable based on CMOS value "vtd"
1 = Enable
0 = Disable

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I1aea14968e08ee6af822bd259ca1d462f8926994
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Sean Rhodes
2021-07-13 07:23:22 +01:00
committed by Felix Held
parent bc89bc6680
commit 66c8062a00
4 changed files with 10 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/soc/intel/skylake/acpi.c
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@@ -245,7 +245,7 @@ unsigned long sa_write_acpi_tables(const struct device *const dev,
acpi_dmar_t *const dmar = (acpi_dmar_t *)current; acpi_dmar_t *const dmar = (acpi_dmar_t *)current;
/* Create DMAR table only if we have VT-d capability. */ /* Create DMAR table only if we have VT-d capability. */
if (!soc_is_vtd_capable()) if (!soc_vtd_enabled())
return current; return current;
printk(BIOS_DEBUG, "ACPI: * DMAR\n"); printk(BIOS_DEBUG, "ACPI: * DMAR\n");

2
src/soc/intel/skylake/chip.c
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@@ -509,7 +509,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->PchIoApicBdfValid = 0; params->PchIoApicBdfValid = 0;
/* Enable VT-d and X2APIC */ /* Enable VT-d and X2APIC */
if (soc_is_vtd_capable()) { if (soc_vtd_enabled()) {
params->VtdBaseAddress[0] = GFXVT_BASE_ADDRESS; params->VtdBaseAddress[0] = GFXVT_BASE_ADDRESS;
params->VtdBaseAddress[1] = VTVC0_BASE_ADDRESS; params->VtdBaseAddress[1] = VTVC0_BASE_ADDRESS;
params->X2ApicOptOut = 0; params->X2ApicOptOut = 0;

2
src/soc/intel/skylake/include/soc/systemagent.h
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@@ -31,7 +31,7 @@
#define MCH_DDR_POWER_LIMIT_LO 0x58e0 #define MCH_DDR_POWER_LIMIT_LO 0x58e0
#define MCH_DDR_POWER_LIMIT_HI 0x58e4 #define MCH_DDR_POWER_LIMIT_HI 0x58e4
bool soc_is_vtd_capable(void); bool soc_vtd_enabled(void);
static const struct sa_mmio_descriptor soc_gfxvt_mmio_descriptor = { static const struct sa_mmio_descriptor soc_gfxvt_mmio_descriptor = {
GFXVTBAR, GFXVTBAR,

9
src/soc/intel/skylake/systemagent.c
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@@ -6,15 +6,20 @@
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <intelblocks/power_limit.h> #include <intelblocks/power_limit.h>
#include <intelblocks/systemagent.h> #include <intelblocks/systemagent.h>
#include <option.h>
#include <soc/cpu.h> #include <soc/cpu.h>
#include <soc/iomap.h> #include <soc/iomap.h>
#include <soc/msr.h> #include <soc/msr.h>
#include <soc/pci_devs.h> #include <soc/pci_devs.h>
#include <soc/systemagent.h> #include <soc/systemagent.h>
#include <types.h>
#include "chip.h" #include "chip.h"
bool soc_is_vtd_capable(void) bool soc_vtd_enabled(void)
{ {
const unsigned int vtd = get_uint_option("vtd", 1);
if (!vtd)
return false;
struct device *const root_dev = pcidev_path_on_root(SA_DEVFN_ROOT); struct device *const root_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
return root_dev && return root_dev &&
!(pci_read_config32(root_dev, CAPID0_A) & VTD_DISABLE); !(pci_read_config32(root_dev, CAPID0_A) & VTD_DISABLE);
@@ -41,7 +46,7 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index)
sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources, sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources,
ARRAY_SIZE(soc_fixed_resources)); ARRAY_SIZE(soc_fixed_resources));
if (soc_is_vtd_capable()) { if (soc_vtd_enabled()) {
if (is_devfn_enabled(SA_DEVFN_IGD)) if (is_devfn_enabled(SA_DEVFN_IGD))
sa_add_fixed_mmio_resources(dev, index, sa_add_fixed_mmio_resources(dev, index,
&soc_gfxvt_mmio_descriptor, 1); &soc_gfxvt_mmio_descriptor, 1);