haswell: allow for disabled hyperthreading
There were assumptions being made in the haswell MP and SMM code which assumed the APIC id space was 1:1 w.r.t. cpu number. When hyperthreading is disabled the APIC ids of the logical processors are all even. That means the APIC id space is sparse. Handle this situation. Change-Id: Ibe79ab156c0a171208a77db8a252aa5b73205d6c Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/3353 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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committed by
Ronald G. Minnich
parent
27435d3bcd
commit
66da043e48
@ -80,6 +80,8 @@ static atomic_t num_aps;
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static atomic_t num_aps_relocated_smm;
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/* Barrier to stop APs from performing SMM relcoation. */
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static int smm_relocation_barrier_begin __attribute__ ((aligned (64)));
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/* Determine if hyperthreading is disabled. */
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int ht_disabled;
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static inline void mfence(void)
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{
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@ -197,6 +199,8 @@ static void asmlinkage ap_init(unsigned int cpu, void *microcode_ptr)
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static void setup_default_sipi_vector_params(struct sipi_params *sp)
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{
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int i;
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u8 apic_id;
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u8 apic_id_inc;
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sp->gdt = (u32)&gdt;
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sp->gdtlimit = (u32)&gdt_end - (u32)&gdt - 1;
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@ -205,9 +209,15 @@ static void setup_default_sipi_vector_params(struct sipi_params *sp)
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sp->stack_top = (u32)&_estack;
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/* Adjust the stack top to take into account cpu_info. */
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sp->stack_top -= sizeof(struct cpu_info);
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/* Default to linear APIC id space. */
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for (i = 0; i < CONFIG_MAX_CPUS; i++)
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sp->apic_to_cpu_num[i] = i;
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/* Default to linear APIC id space if HT is enabled. If it is
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* disabled the APIC ids increase by 2 as the odd numbered APIC
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* ids are not present.*/
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apic_id_inc = (ht_disabled) ? 2 : 1;
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for (i = 0, apic_id = 0; i < CONFIG_MAX_CPUS; i++) {
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sp->apic_to_cpu_num[i] = apic_id;
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apic_id += apic_id_inc;
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}
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}
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#define NUM_FIXED_MTRRS 11
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@ -374,6 +384,10 @@ static int allocate_cpu_devices(struct bus *cpu_bus, int *total_hw_threads)
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max_cpus = CONFIG_MAX_CPUS;
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}
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/* Determine if hyperthreading is enabled. If not, the APIC id space
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* is sparse with ids incrementing by 2 instead of 1. */
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ht_disabled = num_threads == num_cores;
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for (i = 1; i < max_cpus; i++) {
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struct device_path cpu_path;
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device_t new;
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@ -381,6 +395,8 @@ static int allocate_cpu_devices(struct bus *cpu_bus, int *total_hw_threads)
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/* Build the cpu device path */
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cpu_path.type = DEVICE_PATH_APIC;
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cpu_path.apic.apic_id = info->cpu->path.apic.apic_id + i;
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if (ht_disabled)
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cpu_path.apic.apic_id = cpu_path.apic.apic_id * 2;
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/* Allocate the new cpu device structure */
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new = alloc_find_dev(cpu_bus, &cpu_path);
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